©1997 Fairchild Semiconductor Corporation

www.fairchildsemi.com

74VHCT374A Rev. 1.3

2

Logic Symbol

IEEE/IEC

Truth Table

H

= HIGH Voltage Level

L

= LOW Voltage Level

X

= Immaterial

Z

= High Impedance

= LOW-to-HIGH Transition

Functional Description

The VHCT374A consists of eight edge-triggered flip-

flops with individual D-type inputs and 3-STATE true out-

puts. The buffered clock and buffered Output Enable are

common to all flip-flops. The eight flip-flops will store the

state of their individual D inputs that meet the setup and

hold time requirements on the LOW-to-HIGH Clock (CP)

transition. With the Output Enable (OE) LOW, the con-

tents of the eight flip-flops are available at the outputs.

When the OE is HIGH, the outputs go to the high imped-

ance state. Operation of the OE input does not affect the

state of the flip-flops.

Logic Diagram

Please note that this diagram is provided only for the understanding of logic operations and should not be used to

estimate propagation delays.

Inputs

Outputs

CP

OE

H

L

H

L

L

L

X

X

H

Z