Electronic Components Datasheet Search |
|
PDUSBD12PWDH Datasheet(PDF) 5 Page - NXP Semiconductors |
|
PDUSBD12PWDH Datasheet(HTML) 5 Page - NXP Semiconductors |
5 / 22 page Philips Semiconductors PDIUSBD12 USB interface device with parallel bus Product data Rev. 08 — 20 December 2001 5 of 35 9397 750 09238 © Koninklijke Philips Electronics N.V. 2001. All rights reserved. 6. Functional description 6.1 Analog transceiver The integrated transceiver interfaces directly to the USB cables through termination resistors. 6.2 Voltage regulator A 3.3 V regulator is integrated on-chip to supply the analog transceiver. This voltage is also provided as an output to connect to the external 1.5 k Ω pull-up resistor. Alternatively, the PDIUSBD12 provides SoftConnect technology with an integrated 1.5 k Ω pull-up resistor. 6.3 PLL A 6 MHz to 48 MHz clock multiplier PLL (Phase-Locked Loop) is integrated on-chip. This allows for the use of a low-cost 6 MHz crystal. EMI is also minimized due to the lower frequency crystal. No external components are needed for the operation of the PLL. 6.4 Bit clock recovery The bit clock recovery circuit recovers the clock from the incoming USB data stream using 4 × oversampling principle. It is able to track jitter and frequency drift specified by the USB specification. 6.5 Philips Serial Interface Engine (PSIE) The Philips SIE implements the full USB protocol layer. It is completely hardwired for speed and needs no firmware intervention. The functions of this block include: synchronization pattern recognition, parallel/serial conversion, bit stuffing/de-stuffing, CRC checking/generation, PID verification/generation, address recognition, and handshake evaluation/generation. 6.6 SoftConnect The connection to the USB is accomplished by bringing D+ (for high-speed USB device) HIGH through a 1.5 k Ω pull-up resistor. In the PDIUSBD12, the 1.5 kΩ pull-up resistor is integrated on-chip and is not connected to VCC by default. The connection is established through a command sent by the external/system microcontroller. This allows the system microcontroller to complete its initialization sequence before deciding to establish connection to the USB. Re-initialization of the USB bus connection can also be performed without requiring to pull out the cable. The PDIUSBD12 will check for USB VBUS availability before the connection can be established. VBUS sensing is provided through pin EOT_N. See Section 3.2 “Pin description” for details. Sharing of VBUS sensing and EOT_N can be easily accomplished by using VBUS voltage as the pull-up voltage for the normally open-drain output of the DMA controller pin. |
Similar Part No. - PDUSBD12PWDH |
|
Similar Description - PDUSBD12PWDH |
|
|
Link URL |
Privacy Policy |
ALLDATASHEET.COM |
Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Datasheet Upload | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |