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NL17SZ00XV5T2G Datasheet(PDF) 1 Page - ON Semiconductor |
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NL17SZ00XV5T2G Datasheet(HTML) 1 Page - ON Semiconductor |
1 / 6 page © Semiconductor Components Industries, LLC, 2006 November, 2006 − Rev. 5 1 Publication Order Number: NL17SZ00/D NL17SZ00 Single 2−Input NAND Gate The NL17SZ00 is a single 2−input NAND Gate in two tiny footprint packages. The device performs much as LCX multi−gate products in speed and drive. Features • Tiny SOT−353 and SOT−553 Packages • 2.7 ns TPD at 5 V (typ) • Source/Sink 24 mA at 3.0 V • Over−Voltage Tolerant Inputs • Pin For Pin with NC7SZ00P5X, TC7SZ00FU and TC7SZ00AFE • Chip Complexity: FETs = 20 • Designed for 1.65 V to 5.5 V VCC Operation • Pb−Free Packages are Available Figure 1. Pinout (Top View) Figure 2. Logic Symbol & Y A B VCC A B 1 2 3 5 4 GND Y See detailed ordering and shipping information in the package dimensions section on page 4 of this data sheet. MARKING DIAGRAMS L1 M G G SOT−553 XV5 SUFFIX CASE 463B L1 = Specific Device Marking M = Date Code L1 M SOT−353/SC70−5/SC−88A DF SUFFIX CASE 419A 1 5 PIN ASSIGNMENT Pin 1 2 3 4 5 Function A B GND Y VCC Input FUNCTION TABLE B L H L H Output Y = AB Y H H H L A L L H H ORDERING INFORMATION 1 5 1 5 1 5 http://onsemi.com L1 = Specific Device Marking M = Date Code G = Pb−Free Package (Note: Microdot may be in either location) |
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