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AT24C32C Datasheet(PDF) 3 Page - ATMEL Corporation

Part # AT24C32C
Description  2-Wire Serial EEPROM
Download  21 Pages
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Manufacturer  ATMEL [ATMEL Corporation]
Direct Link  http://www.atmel.com
Logo ATMEL - ATMEL Corporation

AT24C32C Datasheet(HTML) 3 Page - ATMEL Corporation

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AT24C32C/64C [Preliminary]
5174B–SEEPR–12/06
Pin Description
SERIAL CLOCK (SCL): The SCL input is used to positive edge clock data into each
EEPROM device and negative edge clock data out of each device.
SERIAL DATA (SDA): The SDA pin is bidirectional for serial data transfer. This pin is
open-drain driven and may be wire-ORed with any number of other open-drain or open
collector devices.
DEVICE/ADDRESSES (A2, A1, A0): The A2, A1 and A0 pins are device address inputs
that are hard wired or left not connected for hardware compatibility with other AT24CXX
devices. When the pins are hardwired, as many as eight 32K/64K devices may be
addressed on a single bus system (device addressing is discussed in detail under the
Device Addressing section). If the pins are left floating, the A2, A1 and A0 pins will be
internally pulled down to GND if the capacitive coupling to the circuit board VCC plane is
<3pF. If coupling is >3pF, Atmel® recommends connecting the address pins to GND.
WRITE PROTECT (WP): The write protect input, when connected to GND, allows nor-
mal write operations. When WP is connected high to VCC, all write operations to the
memory are inhibited. If the pin is left floating, the WP pin will be internally pulled down
to GND if the capacitive coupling to the circuit board VCC plane is <3pF. If coupling is
>3pF, Atmel recommends connecting the pin to GND.
Memory Organization AT24C32C/64C, 32/64K SERIAL EEPROM: The 32K/64K is internally organized as
128/256 pages of 32 bytes each. Random word addressing requires a 12/13 bit data
word address.


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