PSD835G2V-120UI datasheet(8/118 Pages) STMICROELECTRONICS

Part #	PSD835G2V-120UI

Description	Flash PSD, 3 V supply, for 8-bit MCUs 4 Mbit 256 Kbit dual Flash memories and 64 Kbit SRAM

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Manufacturer	STMICROELECTRONICS [STMicroelectronics]

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8 / 118 page

List of tables

PSD835G2V

8/118

Table 49.

Example of PSD typical power calculation at VCC = 3.0 V (with Turbo mode on) . . . . . . . 94

Table 50.

Example of PSD typical power calculation at VCC = 3.0 V (with Turbo mode Off) . . . . . . . 95

Table 51.

Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96

Table 52.

Operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97

Table 53.

AC signal letters for PLD timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97

Table 54.

AC signal behavior symbols for PLD timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98

Table 55.

AC measurement conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98

Table 56.

Capacitance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98

Table 57.

DC characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100

Table 58.

CPLD combinatorial timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101

Table 59.

CPLD Macrocell Synchronous clock mode timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102

Table 60.

CPLD Macrocell Asynchronous clock mode timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102

Table 61.

Input macrocell timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104

Table 62.

Read timing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106

Table 63.

Write timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108

Table 64.

Port F peripheral data mode read timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109

Table 65.

Port F peripheral data mode write timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110

Table 66.

Program, Write and Erase times. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110

Table 67.

Power-down timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111

Table 68.

Reset (RESET) Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111

Table 69.

VSTBYON timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111

Table 70.

ISC timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112

Table 71.

TQFP80 - 80 lead Plastic Quad Flatpack, package mechanical data. . . . . . . . . . . . . . . . 114

Table 72.

Ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 115

Table 73.

PSD835G2V TQFP80. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116

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