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HI-8586PSMF Datasheet(PDF) 2 Page - Holt Integrated Circuits |
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HI-8586PSMF Datasheet(HTML) 2 Page - Holt Integrated Circuits |
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2 / 8 page  Figure 2 shows a possible application of the HI-8585/86 interfacing an ARINC transmit channel from the HI-6010. HI-8585, HI-8586 FUNCTIONAL DESCRIPTION TXAOUT CURRENT CONTROL -5V 5V ONE NULL ZERO CONTROL LOGIC TXBOUT CURRENT CONTROL -5V 5V SLP1.5 ESD PROTECTION AND VOLTAGE TRANSLATION TX0IN TX1IN FIGURE 1 - LINE DRIVER BLOCK DIAGRAM HI-8585 = 37.5 OHMS HI-8586 = 2 OHMS HI-8585 = 37.5 OHMS HI-8586 = 2 OHMS ONE NULL ZERO CONTROL LOGIC “A” SIDE “B” SIDE GND 8 TXBOUT TXAOUT TX1IN TX0IN ARINC Channel RINB RINA TESTA TESTB { HARDWIRED OR DRIVEN FROM LOGIC ROUTB ROUTA 5V VCC V- -15V SLP1.5 TXD0 TXD1 RXD0 RXD1 HI-6010 8 BIT BUS ARINC Channel 1 2 8 6 7 4 3 45 6 7 2 3 HI-8588 FIGURE 2 - APPLICATION DIAGRAM APPLICATION INFORMATION 15V V+ 1 5 HI-8585 Figure 1 is a block diagram of the line driver. The +5V and -5V levels are generated internally using on-chip zeners. Currents for slope control are set by zener voltages across on-chip resistors. The TX0IN and TX1IN inputs receive logic signals from a control transmitter chip such as the HI-6010, HI-3282 or HI-8282. TXAOUT and TXBOUT hold each side of the ARINC bus at Ground until one of the inputs becomes a One. If for example TX1IN goes high, a charging path is enabled to 5V on an “A” side internal capacitor while the “B” side is enabled to -5V. The charging current is se- lected by the SLP1.5 pin. If the SLP1.5 pin is high, the capacitor is nominally charged from 10% to 90% in 1.5µs. If SLP1.5 is low, the rise and fall times are 10µs. A unity gain buffer receives the internally generated slopes and differentially drives the ARINC line. Current is limited by the series output resistors at each pin. There are no fuses at the outputs of the HI-8585 as exists on the HI- 8382. The HI-8585 has 37.5 ohms in series with each output and the HI-8586 has 2 ohms in series with each output. The HI-8586 is for applications where external series resis- tance is required, typically for lightning protection devices. Both the HI-8585 and HI-8586 are built using high-speed CMOS technology. Care should be taken to ensure the V+ and V- supplies are locally decoupled and that the input waveforms are free from negative voltage spikes which may upset the chip’s internal slope control circuitry. HOLT INTEGRATED CIRCUITS 2 |
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