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1389CS–CASIC–06-Nov-06

ATC18 Summary

3.3

Cell Matrices

Note:

All 3-state I/Os, 3-state output only and input pads are also available with pull-up and pull-down device.

Table 3-3.

CMOS Pads

CMOS Cell Name

3-state I/O

Output Only

3-state Output Only

Drive Strength

Pad Sites Used

PC18B01

•

1x

1

PC18B02

•

2x

1

PC18B03

•

3x

1

PC18B04

•

4x

1

PC18B05

•

5x

1

PC18O01

•

1x

1

PC18O02

•

2x

1

PC18O03

•

3x

1

PC18O04

•

4x

1

PC18O05

•

5x

1

PC18T01

•

1x

1

PC18T02

•

2x

1

PC18T03

•

3x

1

PC18T04

•

4x

1

PC18T05

•

5x

1

Table 3-4.

TTL Pads

TTL Cell Name

3-state I/O

Output Only

3-state Output Only

Drive Strength

Pad Sites Used

PT18B01

•

2 mA

1

PT18B02

•

4 mA

1

PT18B03

•

8 mA

1

PT18O01

•

2 mA

1

PT18O02

•

4 mA

1

PT18O03

•

8 mA

1

PT18T01

•

2 mA

1

PT18T02

•

4 mA

1

PT18T03

•

8 mA

1

Table 3-5.

CMOS/TTL Input Only Pad

CMOS Cell Name

Input Levels

Schmitt Input

Level Shifter

Non-inverting

Inverting

Pad Sites Used

PC18D01

CMOS

•

1

PC18D11

CMOS

•

1

PC18D21

CMOS

••

1

PC18D31

CMOS

••

1