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MAX2531ETI Datasheet(PDF) 9 Page - Maxim Integrated Products |
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MAX2531ETI Datasheet(HTML) 9 Page - Maxim Integrated Products |
9 / 27 page Detailed Description Signal Paths and Operation Modes The MAX2351/MAX2354/MAX2358/MAX2359/MAX2530/ MAX2531/MAX2537/MAX2538 have multiple RF signal paths. The cellular signal path has five modes of opera- tion using a 4-gain-mode LNA and a 3-gain-mode mixer. Similarly, the PCS signal path has four modes of opera- tion made up of a 2-gain-mode LNA and a 3-gain-mode mixer. The cellular and PCS mixer’s IF output can be routed to either the IF0 or IF1 port. The GPS signal path consists of a single-mode GPS, LNA, and mixer, which has a dedicated IF output port. Tables 1 and 2 summa- rize the modes of operation. Low-Noise Amplifiers The MAX2351/MAX2358/MAX2530/MAX2531/MAX2538 incorporate three LNA signal paths for the cellular, PCS, and GPS bands. Using Maxim’s latest advanced BiCMOS SiGe process, these LNAs deliver 1dB noise figure for cellular, PCS, and GPS bands. The cellular band LNAs have four modes of operation: high gain/ high linearity (HGHL), high gain/low linearity (HGLL), midgain (MG), and low gain (LG). The PCS band LNAs have two modes of operation: high gain/high linearity and low gain. The GPS LNA has only one mode. The BAND input selects the frequency band. The G1, G2, and MODE pins are logic inputs that control the LNA modes (see Table 2). Use HGHL mode when high Quadruple-Mode PCS/Cellular/GPS LNA/Mixers _______________________________________________________________________________________ 9 Pin Description (continued) PIN MAX2351 MAX2358 MAX2354 MAX2359 MAX2530 MAX2531 MAX2538 MAX2537 NAME FUNCTION 16 16 16 16 16 LO_OUT PCS and Cellular LO Output. Output frequency is equal to mixer LO frequency. Internally matched with DC-blocking capacitor. If not used, connect pin to ground or leave open. 17 17 17 17 17 VCC 2.7V to 3.3V Supply Pin. Connect a 100pF bypass capacitor as close as possible to the pin. 18, 19 18, 19 18, 19 18, 19 18, 19 IF0+, IF0- Differential IF Output Port 0. Requires a pullup inductor and a DC-blocking capacitor at each pin, which can be used as part of the matching network. If not used, connect pins to VCC. —— — 20, 21 20, 21 GIF+, GIF- GPS IF Output. Requires a pullup inductor and a DC-blocking capacitor at each pin, which can be used as part of the matching network. If not used, connect pins to VCC. 22, 23 22, 23 22, 23 22, 23 22, 23 IF1+, IF1- Differential IF Output Port 1. Requires a pullup inductor and a DC-blocking capacitor at each pin, which can be used as part of the matching network. If not used, connect pins to VCC. 24 24 — 24 24 CMIX_IN Cellular Mixer Input. Internally matched to 50 Ω, including an on-chip DC-blocking capacitor. 25 — 25 25 — PMIX_IN PCS Mixer Input. Internally matched to 50 Ω. Requires a DC- blocking capacitor. 26 26 26 26 26 IF_SEL IF Select Logic Input. Logic low selects IF0 port, and logic high selects IF1 port. 27 — — 27 27 BAND BAND Logic Input. See Table 2 for details. 28 — 28 28 — PLNA_OUT PCS LNA Output. Requires a pullup inductor and a DC- blocking capacitor, which can be used as part of the matching network. EP EP EP EP EP Exposed Exposed Pad. RF and DC ground. |
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