AS5SS256K18

Rev. 2.0 12/00

Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.

8

SSRAM

AS5SS256K18

Austin Semiconductor, Inc.

AC TEST CONDITIONS

OUTPUT LOADS

Input rise and fall times

1ns

Input timing reference levels

Output reference levels

Output load

See Figures 1 and 2

Input pulse levels

3.3v

DQ

Fig. 2 OUTPUT LOAD EQUIVALENT

351

Ω

5 pF

317

Ω

Fig. 1 OUTPUT LOAD EQUIVALENT

DQ

50

Ω

Z

Vt = 1.5V

LOAD DERATING CURVES

ASI’s 256K x 18 Synchronous Burst SRAM timing is dependent upon

the capacitive loading on the outputs.

SNOOZE MODE

SNOOZE MODE is a low-current, “power-down” mode in which the

device is deselected and current is reduced to I

The duration of

SNOOZE MODE is dictated by the length of time ZZ is in a HIGH

state. After the device enters SNOOZE MODE, all inputs except ZZ

become gated inputs and are ignored.

ZZ is an asynchronous, active HIGH input that causes the device to

enter SNOOZE MODE. When ZZ becomes a logic HIGH, I

SB2Z

is

guaranteed after the setup time t

ZZ

is met. Any READ or WRITE

operation pending when the device enters SNOOZE MODE is not

quaranteed to complete successfully. Therefore, SNOOZE MODE

must not be initiated until valid pending operations are completed.

* Except ZZ

1234

1234

1234

1234

Don’t Care

SNOOZE MODE WAVEFORM

DESCRIPTION

CONDITIONS

SYM

MIN

MAX

UNITS

NOTES

Current during SNOOZE MODE

10

mA

ZZ active to input ignored

ns

1

ZZ inactive to input sampled

ns

1

ZZ active to snooze current

ns

1

ZZ inactive to exit snooze current

0ns

1

SNOOZE MODE ELECTRICAL CHARACTERISTICS

NOTE: 1. This parameter is sampled.

12345

12345

12345

12345

12345

12345

12345

12345

1234567890

1234567890

1234567890

1234567890

1

1

1

1

12

12

12

12

t

ZZ

t

RZZ

t

ZZI

I

SB2

t

RZZI

CLK

ZZ

I

SUPPLY

ALL INPUTS*