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MM74HCT74SJ Datasheet(PDF) 4 Page - Fairchild Semiconductor |
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MM74HCT74SJ Datasheet(HTML) 4 Page - Fairchild Semiconductor |
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4 / 8 page  www.fairchildsemi.com 4 AC Electrical Characteristics VCC = 5V, TA = 25°C, CL = 15 pF, tr = tf = 6 ns AC Electrical Characteristics VCC = 5.0V ± 10%, CL = 50 pF, tr = tf = 6 ns unless otherwise specified Note 6: CPD determines the no load dynamic power consumption, PD = CPD VCC 2 f + I CC VCC, and the no load dynamic current consumption, IS = CPD VCC f + ICC. Symbol Parameter Conditions Typ Guaranteed Units Limit fMAX Maximum Operating 50 30 MHz Frequency from Clock to Q or Q tPHL, tPLH Maximum Propagation 18 30 ns Delay Clock to Q or Q tPHL, tPLH Maximum Propagation 18 30 ns Delay from Preset or Clear to Q or Q tREM Minimum Removal Time, 20 ns Preset or Clear to Clock tS Minimum Setup Time 20 ns Data to Clock tH Minimum Hold Time −30 ns Clock to Data tW Minimum Pulse Width 8 16 ns Clock, Preset or Clear Symbol Parameter Conditions TA = 25°CTA = −40° to +85°C Units Typ Guaranteed Limits fMAX Maximum Operating 27 21 MHz Frequency tPHL, tPLH Maximum Propagation 21 35 44 ns Delay from Clock to Q or Q tPHL, tPLH Maximum Propagation 21 35 44 ns Delay from Preset or Clear to Q or Q tREM Minimum Removal Time 20 25 ns Preset or Clear to Clock tS Minimum Setup Time 20 25 ns Data to Clock tH Minimum Hold Time −30 0 ns Clock to Data tW Minimum Pulse Width 9 16 20 ns Clock, Preset or Clear tr, tf Maximum Clock Input 500 500 ns Rise and Fall Time tTHL, tTLH Maximum Output 15 19 ns Rise and Fall Time CPD Power Dissipation (per flip-flop) 10 pF Capacitance (Note 6) CIN Maximum Input 5 10 10 pF Capacitance |
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