SN54LVTH573, SN74LVTH573

3.3V ABT OCTAL TRANSPARENT DTYPE LATCHES

WITH 3STATE OUTPUTS

SCBS687H − MAY 1997 − REVISED SEPTEMBER 2003

4

POST OFFICE BOX 655303

recommended operating conditions (see Note 5)

SN54LVTH573

SN74LVTH573

UNIT

MIN

MAX

MIN

MAX

UNIT

VCC

Supply voltage

2.7

3.6

2.7

3.6

V

VIH

High-level input voltage

2

2

V

VIL

Low-level input voltage

0.8

0.8

V

VI

Input voltage

5.5

5.5

V

IOH

High-level output current

−24

−32

mA

IOL

Low-level output current

48

64

mA

∆t/∆v

Input transition rise or fall rate

Outputs enabled

10

10

ns/V

∆t/∆VCC

Power-up ramp rate

200

200

µs/V

TA

Operating free-air temperature

−55

125

−40

85

°C

NOTE 5: All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,

Implications of Slow or Floating CMOS Inputs, literature number SCBA004.