www.ti.com

OFF

ON

OFF

SW

T

LOGIC

V

V

I

I

V

(ZERO)

V

(SW)

V

(BAT)

V

A

V

OUT

0V

0V

I

(SW)

I

(PEAK)

0 A

I

OUT

I

(PEAK)

(TURN)

/N

0 A

Time1

Time2

Time3

Time4

Time5

SW

T

CHG

XFULL

OFF

ON

OFF

OFF ON

OFF

VBAT

0V

VBAT

0V

I

(PEAK)

0 A

0 A

V

V

I

I

Control Charging

t

ON

=L

I

PEAK

V

BAT

(1)

TPS65561

SLVS691 – FEBRUARY 2007

Figure 5. Timing Diagram at One Switching Cycle

Figure 6. Timing Diagram at Beginning/Ending

The TPS65561 provides three comparators to control charging. Figure 2 shows the block diagram of TPS65561

and Figure 5 shows a timing diagram of one switch cycle. Note that emphasis is placed on Time1 and Time3 of

the waveform in Figure 5.

While SW is ON (Time1 to Time2 in Figure 5), U3 monitors current flow through the integrated power switch

When SW turns OFF (Time2 in Figure 5), the magnetic energy in the transformer starts discharging. Meanwhile,

U2 monitors the kickback voltage at the SW terminal. As the energy is discharging, the kickback voltage is

Figure 5). After rectification stops, the small amount of energy left in the transformer is released via parasitic

paths, and the kickback voltage reaches zero (Time3 to Time4 in Figure 5). During this period, U2 makes SW

Time4 and Time5 in Figure 5 is small or does not appear dependent on the delay time of the U2 detection to SW

ON.

Figure 6).

In Figure 5 and Figure 6, ON time is always the same period in every switch cycle. The ON time is calculated by

7

Submit Documentation Feedback