www.ti.com

VID = 0 V

VOD = 0 V

t PLHD

t PHLD

IN

OUT

Clock Input

0 V

1/fo

PRBS Input

0 V

PRBS Output

0 V

0 V

0 V

0 V

Actual Output

Ideal Output

1/fo

Period Jitter

Cycle-to-Cycle Jitter

Peak-to-Peak Jitter

Actual Output

25-inchFR4

(63,5cm)

<3-inch50

TL

(7,62cm)

W

<3-inch50

TL

(7,62cm)

W

SN65LVCP404

SLLS700 – MARCH 2007

PARAMETER MEASUREMENT INFORMATION (continued)

Figure 6. Propagation Delay Input to Output

A.

All input pulses are supplied by an Agilent 81250 Stimulus System.

B.

The measurement is made with the AgilentParBert measurement software.

Figure 7. Driver Jitter Measurement Waveforms

Figure 8. AC Test Circuit — Jitter and Output Rise Time Test Circuit

The SN65LVCP404 input equalizer provides 5-dB frequency gain to compensate for frequency loss of a shorter

backplane transmission line. For characterization purposes, a 25-inch (63,5 cm) FR-4 coupled transmission line

is used in place of the backplane trace. The 25-inch trace provides roughly 5 dB of attenuation between 375

MHz and 2.125 GHz, representing closely the characteristics of a short backplane trace. The loss tangent of the

FR4 in the test board is 0.018 with an effective

ε(r) of 4.1.

9

Submit Documentation Feedback