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X40431S14I-B Datasheet(PDF) 10 Page - Intersil Corporation |
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X40431S14I-B Datasheet(HTML) 10 Page - Intersil Corporation |
10 / 26 page 10 FN8251.1 May 24, 2006 Figure 5. Sample VTRIP Reset Circuit Figure 6. VTRIPX Set/Reset Sequence (X = 1, 2, 3) WEL: Write Enable Latch (Volatile) The WEL bit controls the access to the memory and to the Register during a write operation. This bit is a vola- tile latch that powers up in the LOW (disabled) state. While the WEL bit is LOW, writes to any address, including any control registers will be ignored (no acknowledge will be issued after the Data Byte). The WEL bit is set by writing a “1” to the WEL bit and zeroes to the other bits of the control register. 1 6 2 7 14 13 9 8 X4043X VTRIP1 Adj. VP SDA SCL µC Adjust Run V2FAIL VTRIP2 Adj. RESET VTRIPX Programming Apply VCC and Voltage Decrease VX Actual VTRIPX - Desired VTRIPX DONE Set Higher VX Sequence Error < MDE– | Error | < | MDE | YES NO Error > MDE+ > Desired VTRIPX to VX Desired Present Value VTRIPX< Execute No YES Execute VTRIPX Reset Sequence Set VX = desired VTRIPX New VX applied = Old VX applied + | Error | New VX applied = Old VX applied - | Error | Execute Reset VTRIPX Sequence Output Switches? Note: X = 1, 2, 3 Let: MDE = Maximum Desired Error Vx = VCC, VxMON MDE+ Desired Value MDE– Acceptable Error Range Error = Actual - Desired X40430, X40431, X40434, X40435 |
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