© 2006 Fairchild Semiconductor Corporation

www.fairchildsemi.com

FIN12AC Rev. 1.1.0

6

A third method of serialization uses a free-running bit clock on the CKSI signal.

This mode is enabled by grounding the CKREF signal and driving the DIRI signal

HIGH.

At power-up, the device is configured to accept a serialization clock from CKSI. If

a CKREF is received, this device enables the CKREF serialization mode. The

device remains in this mode even if CKREF is stopped. To re-enable this mode,

the device must be powered down and powered back up with “logic 0” on CKREF.

Figure 5. Serializer Timing Diagram Using Provided Bit Clock (No CKREF)

No Data

WORD n-1

WORD n

DP[1:12]

STROBE

DSO

WORD n-1

WORD n

WORD n+1

No Data

CKSI

CKSO

b1 b2 b3 b4 b5 b6 b7 b8 b9 b10 b11 b12 b13 b14

b1 b2 b3

Serializer Operation: (Figure 5)

DIRI = 1,

No CKREF