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X9428YS16IZ-2.7 Datasheet(PDF) 4 Page - Intersil Corporation |
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X9428YS16IZ-2.7 Datasheet(HTML) 4 Page - Intersil Corporation |
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4 / 21 page  4 FN8197.1 April 26, 2006 PIN DESCRIPTIONS Host Interface Pins Serial Clock (SCL) The SCL input is used to clock data into and out of the X9428. Serial Data (SDA) SDA is a bidirectional pin used to transfer data into and out of the device. It is an open drain output and may be wire-ORed with any number of open drain or open collector outputs. An open drain output requires the use of a pull-up resistor. For selecting typical values, refer to the guidelines for calculating typical values on the bus pull-up resistors graph. Device Address (A0, A2, A3) The Address inputs are used to set the least significant 3 bits of the 8-bit slave address. A match in the slave address serial data stream must be made with the Address input in order to initiate communication with the X9428. A maximum of 8 devices may occupy the 2-wire serial bus. Potentiometer Pins RH/VH, RL/VL The RH/VH and RL/VL inputs are equivalent to the terminal connections on either end of a mechanical potentiometer. RW/VW The wiper outputs are equivalent to the wiper output of a mechanical potentiometer. Hardware Write Protect Input WP The WP pin when low prevents nonvolatile writes to the Data Registers. Analog Supply V+, V- The Analog Supply V+, V- are the supply voltages for the XDCP analog section. PIN CONFIGURATION PIN NAMES Symbol Description SCL Serial clock SDA Serial data A0, A2, A3 Device address RH/VH, VL/RH Potentiometer Pins (terminal equivalent) RW/VW Potentiometer Pin (wiper equivalent) WP Hardware write protection V+,V- Analog and voltage follower VCC System supply voltage VSS System ground NC No connection VCC A2 RL/VL SDA WP 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 V+ NC A0 NC A3 SCL NC V- DIP/SOIC X9428 VSS RH/VH RW/VW 1 2 3 4 5 6 7 14 13 12 11 10 9 8 TSSOP X9428 A2 RL SDA WP VSS RH RW VCC V+ A0 NC A3 SCL V- X9428 |
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