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X4003S8 Datasheet(PDF) 9 Page - Intersil Corporation

Part # X4003S8
Description  CPU Supervisor
Download  18 Pages
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Manufacturer  INTERSIL [Intersil Corporation]
Direct Link  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

X4003S8 Datasheet(HTML) 9 Page - Intersil Corporation

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9
FN8113.1
May 11, 2006
Figure 5. Valid Data Changes on the SDA Bus
Serial Start Condition
All commands are preceded by the start condition,
which is a HIGH to LOW transition of SDA when SCL
is HIGH. The device continuously monitors the SDA
and SCL lines for the start condition and will not
respond to any command until this condition has been
met. See Figure 6.
Serial Stop Condition
All communications must be terminated by a stop con-
dition, which is a LOW to HIGH transition of SDA when
SCL is HIGH. The stop condition is also used to place
the device into the Standby power mode after a read
sequence. A stop condition can only be issued after the
transmitting device has released the bus. See Figure 6.
Figure 6. Valid Start and Stop Conditions
Serial Acknowledge
Acknowledge is a software convention used to indi-
cate successful data transfer. The transmitting device,
either master or slave, will release the bus after trans-
mitting eight bits. During the ninth clock cycle, the
receiver will pull the SDA line LOW to acknowledge
that it received the eight bits of data. Refer to Figure 7.
The device will respond with an acknowledge after
recognition of a start condition and the correct con-
tents of the slave address byte. Acknowledge bits are
also provided by the X4003/4005 after correct recep-
tion of the control register address byte, after receiving
the byte written to the control register and after the
second slave address in a read question (See Figure 8
and See Figure 9.)
SCL
Data Stable
Data Change
Data Stable
SDA
SCL
SDA
Start
Stop
X4003, X4005


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