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EL5325AIREZ Datasheet(PDF) 9 Page - Intersil Corporation |
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EL5325AIREZ Datasheet(HTML) 9 Page - Intersil Corporation |
9 / 12 page 9 chip is on external clock mode. Setting B14 to low, the chip is on internal clock mode. CHANNEL OUTPUTS Each of the channel outputs has a rail-to-rail buffer. This enables all channels to have the capability to drive to within 50mV of the power rails, (see Electrical Characteristics for details). When driving large capacitive loads, a series resistor should be placed in series with the output. (Usually between 5 Ω and 50 Ω). Each of the channels is updated on a continuous cycle, the time for the new data to appear at a specific output will depend on the exact timing relationship of the incoming data to this cycle. The best-case scenario is when the data has just been captured and then passed on to the output stage immediately; this can be as short as 48µs. In the worst-case scenario this will be 576µs when the data has just missed the cycle. When a large change in output voltage is required, the change will occur in 2V steps, thus the requisite number of timing cycles will be added to the overall update time. This means that a large change of 16V can take between 4.6ms to 5.2ms depending on the absolute timing relative to the update cycle. POWER DISSIPATION AND THERMAL SHUTDOWN With the 30mA maximum continues output drive capability for each channel, it is possible to exceed the 125°C absolute maximum junction temperature. Therefore, it is important to calculate the maximum junction temperature for the application to determine if load conditions need to be modified for the part to remain in the safe operation. The maximum power dissipation allowed in a package is determined according to: where: •TJMAX = Maximum junction temperature •TAMAX = Maximum ambient temperature • θJA = Thermal resistance of the package •PDMAX = Maximum power dissipation in the package The maximum power dissipation actually produced by the IC is the total quiescent supply current times the total power supply voltage and plus the power in the IC due to the loads. when sourcing, and: when sinking. Where: • i = 1 to total 12 •VS = Supply voltage •IS = Quiescent current •VOUTi = Output voltage of the i channel •ILOADi = Load current of the i channel By setting the two PDMAX equations equal to each other, we can solve for the RLOADs to avoid the device overheat. The package power dissipation curves provide a convenient way to see if the device will overheat. The EL5325A has an internal thermal shutdown circuitry that prevents overheating of the part. When the junction temperature goes up to about 150°C, the part will be disabled. When the junction temperature drops down to about 120°C, the part will be enabled. With this feature, any short circuit at the outputs will enable the thermal shutdown circuitry to disable the part. POWER SUPPLY BYPASSING AND PRINTED CIRCUIT BOARD LAYOUT Good printed circuit board layout is necessary for optimum performance. A low impedance and clean analog ground plane should be used for the EL5325A. The traces from the two ground pins to the ground plane must be very short. The thermal pad of the EL5325A should be connected to the analog ground plane. Lead length should be as short as possible and all power supply pins must be well bypassed. A 0.1µF ceramic capacitor must be place very close to the VS, VREFH, VREFL, and CAP pins. A 4.7µF local bypass tantalum capacitor should be placed to the VS, VREFH, and VREFL pins. APPLICATION USING THE EL5325A In the first application drawing, the schematic shows the interconnect of a pair of EL5325A chips connected to give 12 gamma corrected voltages above the VCOM voltage, and 12 gamma corrected voltages below the VCOM voltage. External Shutdown The EL5325A also has an external shutdown to enable and disable the part. The SHDN pin should never be driven low. Rather, to enable the part, the SHDN pin must be left open (float). To disable, the SHDN pin must be driven HI (>2V). WIth this feature, the EL5325A can be forced to shut down, regardless of any other conditions. A simple open collector driver is adequate to control the enable and disable function: PDMAX TJMAX - TAMAX ΘJA --------------------------------------------- = PDMAX VS IS Σ VS ( - VOUTi) ILOADi × [] + × = PDMAX VS IS Σ VOUTiILOADi × () + × = VSD SHDN R1 100K R2 100K Q1 PNP SHDN EL5325A EL5325A |
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