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EL5173IS Datasheet(PDF) 11 Page - Intersil Corporation |
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EL5173IS Datasheet(HTML) 11 Page - Intersil Corporation |
11 / 14 page 11 FN7312.5 January 25, 2006 Maximum reliability is maintained if the output current never exceeds ±60mA. This limit is set by the design of the internal metal interconnect. Power Dissipation With the high output drive capability of the EL5173 and EL5373 it is possible to exceed the 125°C absolute maximum junction temperature under certain load current conditions. Therefore, it is important to calculate the maximum junction temperature for the application to determine if the load conditions or package types need to be modified for the amplifier to remain in the safe operating area. The maximum power dissipation allowed in a package is determined according to: Where: •TJMAX = Maximum junction temperature •TAMAX = Maximum ambient temperature • θJA = Thermal resistance of the package The maximum power dissipation actually produced by an IC is the total quiescent supply current times the total power supply voltage, plus the power in the IC due to the load, or: Where: •VS = Total supply voltage •ISMAX = Maximum quiescent supply current per channel • ∆VO = Maximum differential output voltage of the application •RLD = Differential load resistance •ILOAD = Load current • i = Number of channels By setting the two PDMAX equations equal to each other, we can solve the output current and RLOAD to avoid the device overheat. Power Supply Bypassing and Printed Circuit Board Layout As with any high frequency device, a good printed circuit board layout is necessary for optimum performance. Lead lengths should be as sort as possible. The power supply pin must be well bypassed to reduce the risk of oscillation. For normal single supply operation, where the VS- pin is connected to the ground plane, a single 4.7µF tantalum capacitor in parallel with a 0.1µF ceramic capacitor from VS+ to GND will suffice. This same capacitor combination should be placed at each supply pin to ground if split supplies are to be used. In this case, the VS- pin becomes the negative supply rail. For good AC performance, parasitic capacitance should be kept to minimum. Use of wire wound resistors should be avoided because of their additional series inductance. Use of sockets should also be avoided if possible. Sockets add parasitic inductance and capacitance that can result in compromised performance. Minimizing parasitic capacitance at the amplifier’s inverting input pin is very important. The feedback resistor should be placed very close to the inverting input pin. Strip line design techniques are recommended for the signal traces. Typical Applications Twisted pair cable driver PD MAX T JMAX T AMAX – Θ JA --------------------------------------------- = PD i V S I SMAX V S ∆V O R LD ------------ × + × × = 0 Ω VFB VINB VREF EL5175/ EL5375 EL5173/ EL5373 VOUT 50 50 ZO = 100Ω VIN 50 Ω 50 Ω FIGURE 23. TWISTED PAIR CABLE DRIVER EL5173, EL5373 |
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