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FAN5331 Datasheet(PDF) 6 Page - Fairchild Semiconductor |
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FAN5331 Datasheet(HTML) 6 Page - Fairchild Semiconductor |
6 / 10 page 6 www.fairchildsemi.com FAN5331 Rev. 1.0.1 Block Diagram Figure 4. Block Diagram Circuit Description The FAN5331 is a pulse-width modulated (PWM) current-mode boost converter. The FAN5331 improves the performance of bat- tery powered equipment by significantly minimizing the spectral distribution of noise at the input caused by the switching action of the regulator. In order to facilitate effective noise filtering, the switching frequency was chosen to be high, 1.6MHz. An internal soft start circuitry minimizes in-rush currents. The timing of the soft start circuit was chosen to reach 95% of the nominal output voltage within maximum 5mS following an enable command when VIN = 2.7V, VOUT = 15V, ILOAD = 35mA and COUT (EFFECTIVE) = 3.2µF. The device architecture is that of a current mode controller with an internal sense resistor connected in series with the N-chan- nel switch. The voltage at the feedback pin tracks the output voltage at the cathode of the external Schottky diode (shown in the test circuit). The error amplifier amplifies the difference between the feedback voltage and the internal bandgap refer- ence. The amplified error voltage serves as a reference voltage to the PWM comparator. The inverting input of the PWM com- parator consists of the sum of two components: the amplified control signal received from the 50m Ω current sense resistor and the ramp generator voltage derived from the oscillator. The oscillator sets the latch, and the latch turns on the FET switch. Under normal operating conditions, the PWM comparator resets the latch and turns off the FET, thus terminating the pulse. Since the comparator input contains information about the out- put voltage and the control loop is arranged to form a negative feedback loop, the value of the peak inductor current will be adjusted to maintain regulation. Every time the latch is reset, the FET is turned off and the cur- rent flow through the switch is terminated. The latch can be reset by other events as well. Over-current condition is moni- tored by the current limit comparator which resets the latch and turns off the switch instantaneously within each clock cycle. Over-Voltage Protection The voltage on the feedback pin is sensed by an OVP Compar- ator. When the feedback voltage is 15% higher than the nominal voltage, the OVP Comparator stops switching of the power tran- sistor, thus preventing the output voltage from going higher. Applications Information Setting the Output Voltage The internal reference is 1.23V (Typical). The output voltage is divided by a resistor divider, R1 and R2 to the FB pin. The out- put voltage is given by According to this equation, and assuming desired output volt- age of 15V, good choices for the feedback resistors are, R1=150kΩ and R2=13.4kΩ. Inductor Selection The inductor parameters directly related to device performances are saturation current and dc resistance. The FAN5331 oper- ates with a typical inductor value of 10µH. The lower the dc resistance, the higher the efficiency. Usually a trade-off between inductor size, cost and overall efficiency is needed to make the optimum choice. Reference Oscillator n FB FB Driver Over Voltage Comp Comp - - + + S Ramp Generator R R R Q S Current Limit Comparator 0.05 1.15 x VREF Shutdown Circuitry Thermal Shutdown SHDN GND SW VIN Amp Error Amp 45 1 2 3 + + - - + - Soft-Start V OUT V REF 1 R 1 R 2 ------- + = |
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