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ISL8010IUZ Datasheet(PDF) 10 Page - Intersil Corporation |
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ISL8010IUZ Datasheet(HTML) 10 Page - Intersil Corporation |
10 / 11 page 10 FN6191.4 July 12, 2006 wait-restart event. This is called a “hiccup” event. The average power dissipation is reduced, thereby reducing the likelihood of damage current and thermal conditions in the IC. Thermal Shutdown Once the junction reaches about 145°C, the regulator shuts down. Both the P-channel and the N-channel MOSFETs turn off. The output voltage will drop to zero. With the output MOSFETs turned off, the regulator will cool down. Once the junction temperature drops to about 130°C, the regulator will perform a normal restart. Thermal Performance The ISL8010 is available in a fused-lead MSOP10. Compared with regular MSOP10 package, the fused-lead package provides lower thermal resistance. The θ JA is 100°C/W on a 4-layer board and 125°C/W on 2-layer board. Maximizing the copper area around the pins will further improve the thermal performance. Power Good Output The PG (pin 8) output is used to indicate when the output voltage is properly regulating at the desired set point. It is an open-drain output that should be tied to VIN or VCC through a 100k Ω resistor. If no faults are detected, EN is high, and the output voltage is within ~5% of regulation, the PG pin will be allowed to go high. Otherwise, the open-drain NMOS will pull PG low. Output Voltage Selection Users can set the output voltage of the variable version with a resister divider, which can be chosen based on the following formula: Component Selection Because of the fixed internal compensation, the component choice is relatively narrow. For a regulator with fixed output voltage, only two capacitors and one inductor are required. It is recommended to use between 10µF and 22µF multilayer ceramic capacitors with X5R or X7R rating for both the input and output capacitors, and 1.5µH to 2.2µH for the inductor. The RMS current present at the input capacitor is decided by the following formula: This is about half of the output current IO for all the VO. This input capacitor must be able to handle this current. The inductor peak-to-peak ripple current is given as: L is the inductance fS the switching frequency (nominally 1.4MHz) The inductor must be able to handle IO for the RMS load current, and to assure that the inductor is reliable, it must handle the 2A surge current that can occur during a current limit condition. In addition to decoupling capacitors and inductor value, it is important to properly size the phase-lead capacitor C4 (Refer to the Typical Application Diagram). The phase-lead capacitor creates additional phase margin in the control loop by generating a zero and a pole in the transfer function. As a general rule of thumb, C4 should be sized to start the phase- lead at a frequency of ~2.5kHz. The zero will always appear at lower frequency than the pole and follow the equation below: Over a normal range of R2 (~10-100k), C4 will range from ~470-4700pF. The pole frequency cannot be set once the zero frequency is chosen as it is dictated by the ratio of R1 and R2, which is solely determined by the desired output set point. The equation below shows the pole frequency relationship: Layout Considerations The layout is very important for the converter to function properly. The following PC layout guidelines should be followed: 1. Separate the Power Ground ( ) and Signal Ground ( ); connect them only at one point right at the pins 2. Place the input capacitor as close to VIN and PGND pins as possible 3. Make the following PC traces as small as possible: 4. from LX pin to L 5. from CO to PGND 6. If used, connect the trace from the FB pin to R1 and R2 as close as possible 7. Maximize the copper area around the PGND pin 8. Place several via holes under the chip to additional ground plane to improve heat dissipation The demo board is a good example of layout based on this outline. Please refer to the ISL8010 Application Brief. tHICCUP 700 µ V IN ⋅ 3 ---------------------------- 216 µ + ⎝⎠ ⎛⎞ ≈ (EQ. 1) V O 0.8 1 R 2 R 1 ------- + ⎝⎠ ⎜⎟ ⎛⎞ × = I INRMS V O V IN V O – () × V IN ----------------------------------------------- I O × = ∆I IL V IN ( V O ) V O × – LV IN f S × × -------------------------------------------- = f Z 1 2 πR 2C4 ---------------------- = f P 1 2 π R 1 R2 ()C 4 --------------------------------------- = ISL8010 |
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