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NE5537N Datasheet(PDF) 3 Page - NXP Semiconductors |
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NE5537N Datasheet(HTML) 3 Page - NXP Semiconductors |
3 / 8 page Philips Semiconductors Linear Products Product specification NE/SE5537 Sample-and-hold amplifier August 31, 1994 886 DC ELECTRICAL CHARACTERISTICS1 SYMBOL PARAMETER TEST CONDITIONS SE5537 NE5537 UNIT SYMBOL PARAMETER TEST CONDITIONS Min Typ Max Min Typ Max UNIT TJ=25°C 1 3 2 7 mV VOS Input offset voltage4 Full temperature range 5 10 mV TJ=25°C 5 25 10 50 nA IBIAS Input bias current4 Full temperature range 75 100 nA Input impedance TJ=25°C 1010 1010 Ω Gain error TJ=25°C 0.002 0.007 0.004 0.01 % -10V ≤VIN≤10V, RL=2kΩ -11.5V ≤VIN≤11.5V, RL=10kΩ Full temperature range 0.02 0.02 % Feedthrough attenuation ratio at 1kHz TJ=25°C, CH=0.01µF 86 96 80 90 dB Output impedance TJ=25°C, “HOLD” mode 0.5 2 0.5 4 Ω Full temperature range 4 6 “HOLD” Step2 TJ=25°C, CH=0.01µF, VOUT=0 0.5 2.0 1.0 2.5 mV ICC Supply current4 TJ=25°C 4.5 6.5 4.5 7.5 mA Logic and logic reference input current TJ=25°C 2 10 2 10 µA Leakage current into hold capacitor4 TJ=25°C “hold” mode3 6 50 6 100 pA Acquisition time to 0.1% VOUT=10V, CH=1000pF 4 4 µs CH=0.01µF 20 20 µs Hold capacitor charging current VIN-VOUT=2V 5 5 mA SVRR Supply voltage rejection ratio VOUT=0V 80 110 80 110 dB Differential logic threshold TJ=25°C 0.8 1.4 2.4 0.8 1.4 2.4 V NOTES: 1. Unless otherwise specified, the following conditions apply: Unit is in “sample” mode. VS=±15V, TJ=25°C, -11.5V≤VIN≤11.5V, CH=0.01µF, and RL=2kΩ. Logic reference voltage=0V and logic voltage=2.5V. 2. Hold step is sensitive to stray capacitive coupling between input logic signals and the hold capacitor. 1pF, for instance, will create an additional 0.5mV step with a 5V logic swing and a 0.01F hold capacitor. Magnitude of the hold step is inversely proportional to hold capacitor value. 3. Leakage current is measured at a junction temperature of 25 °C. The effects of junction temperature rise due to power dissipation or elevated ambient can be calculated by doubling the 25 °C value for each 11°C increase in chip temperature. Leakage is guaranteed over full input signal range. 4. These parameters guaranteed over a supply voltage range of ±5 to ±18V. |
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