4

FN6072.6

November 14, 2006

Application Information

The application circuit to adjust the VCOM voltage in an LCD

panel is shown in Figure 1. The ISL45042 has a 128-step

sink current resolution. The output is connected to an

external voltage divider, that results in decreasing the output

VCOM voltage as you increase the ISL45042 sink current.

CTL Pin

The adjustment of the output VCOM voltage and the

programming of the non-volatile memory are provided

through a single pin called CTL, when the CE pin is high.

The output VCOM voltage is increased with a mid (Vdd/2) to

high transition (0.8*VDD) on CTL pin. The output VCOM

voltage is decreased with a mid (Vdd/2) to low transition

(0.3*VDD), on CTL pin (Reference Figure 6). Once the

minimum or maximum value is reached on the 128 steps,

the device will not overflow or underflow beyond that

minimum or maximum value.

Programming of the non-volatile memory occurs when the

CTL pin exceeds 4.9V. The CTL signal needs to remain

above 4.9V for more than 200µs. The level and timing

needed to program the non-volatile memory is given in

Figure 2. It then takes a maximum of 100ms for the

programming to be completed inside the device.

Programming Time

Full

100

ms

SET Voltage Resolution

(Note 4)

Full

7

7

7

Bits

SET Differential Nonlinearity

Monotonic Over Temperature

Full

-

-

±1LSB

SET Zero-Scale Error

Full

-

-

±2LSB

SET Full-Scale Error

Full

-

-

±8LSB

SET Current

ISET

Full

-

20

-

μA

SET External Resistance

To GND, AVDD = 20V

Full

10

-

200

k

Ω

To GND, AVDD = 4.5V

Full

2.25

-

45

k

Ω

AVDD to SET Voltage Attenuation

AVDD to SET

Full

-

1:20

-

V/V

OUT Settling Time

to

±0.5 LSB Error Band (Note 5)

Full

-

20

-

μs

OUT Voltage Range

Full

VSET +

0.5V

-13

V

OUT Voltage Drift

(Note 5)

25 to 55

-

<10

-

mV

NOTES:

2. CTL signal only needs to be greater than 4.9V to program EEPROM.

3. Tested at AVDD = 20V.

4. The Counter value is set to mid-scale

±4 LSB’s in the Production.

5. Simulated and Determined via Design and NOT Directly Tested.

6. Simulated Maximum Current Draw when Programming EEPROM is 23mA, should be considered when designing Power Supply.

7. A Typical Current of 20

μA is Calculated using the AVDD = 10V and RSET = 24.9kΩ. The maximum suggested SET Current should be 120μA.

Electrical Specifications

PARAMETER

SYMBOL

TEST CONDITIONS

TEMP

(°C)

MIN

TYP

MAX

UNITS

FIGURE 1. VCOM ADJUSTMENT IN AN LCD PANEL

ISL45042

SET

OUT

AVDD

AVDD

VCOM

SINGLE PIXEL

CTL

CE

IN LCD PANEL

+

-

COLUMN

DRIVER

ISL45042