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HC5503PRCRZ Datasheet(PDF) 6 Page - Intersil Corporation |
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HC5503PRCRZ Datasheet(HTML) 6 Page - Intersil Corporation |
6 / 11 page 6 15 15 PD Power Denial - A low active TTL - Compatible logic input. When enabled, the ring feed voltage collapses to the tip feed voltage (~4V). The DC feed is disabled, but the AC transmission is maintained. The switch hook detect (SHD) is not necessarily valid, and the relay driver (RD) output is disabled. 16 16 RC Ring Command - A low active TTL - Compatible logic input. When enabled, the relay driver (RD) output goes low on the next high level of the ring sync (RS) input, as long as the SLIC is not in the power denial state (PD = 0) or the subscriber is not already off- hook (SHD = 0). 17 NC Leave disconnected. 18 20 OUT The analog output of the spare operational amplifier. 19 21 -IN The inverting analog input of the spare operational amplifier. 20 22 +IN The non-inverting analog input of the spare operational amplifier. 21 23 RX Receive Input, Four Wire Side - A high impedance analog input which is internally biased. Capacitive coupling to this input is required. AC signals appearing at this input differentially drive the Tip feed and Ring feed terminals. 22 25 C2 Capacitor #2 - An external capacitor to be connected between this terminal and analog ground. This capacitor is required for the proper operation of ring trip detection. Recommended value 0.82 µF ±10% 10V non-polarized. 23 26 AG Analog Ground - To be connected to zero potential and serves as a reference for the transmit output (TX) and receive input (RX) terminals. 24 27 TX Transmit Output, Four Wire Side - A low impedance analog output proportional to the loop current. Transhybrid balancing must be performed beyond this output to completely implement two to four wire conversion. This output is unbalanced and referenced to analog ground. Since the DC level of this output varies with loop current, capacitive coupling to the next stage is essential. 2, 17, 18,24, 29, 30, NC No internal connection. NOTE: All grounds (AG, BG, and DG) must be applied before VB+ or VB-. Failure to do so may result in premature failure of the part. If a user wishes to run separate grounds off a line card, the AG must be applied first. Pin Descriptions (Continued) 24 PIN DIP/SOIC 7 x 7 QFN SYMBOL DESCRIPTION HC5503PRC |
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