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HI3304JIB Datasheet(PDF) 11 Page - Intersil Corporation |
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HI3304JIB Datasheet(HTML) 11 Page - Intersil Corporation |
11 / 12 page 11 Definitions Dynamic Performance Definitions Fast Fourier Transform (FFT) techniques are used to evaluate the dynamic performance of the HI3304. A low distortion sine wave is applied to the input, it is sampled, and the output is stored in RAM. The data is then transformed into the fre- quency domain with a 4096 point FFT and analyzed to evalu- ate the dynamic performance of the A/D. The sine wave input to the part is -0.5dB down from fullscale for all these tests. Signal-to-Noise (SNR) SNR is the measured RMS signal to RMS noise at a speci- fied input and sampling frequency. The noise is the RMS sum of all of the spectral components except the fundamen- tal and the first five harmonics. Signal-to-Noise + Distortion Ratio (SINAD) SINAD is the measured RMS signal to RMS sum of all other spectral components below the Nyquist frequency excluding DC. Effective Number of Bits (ENOB) The effective number of bits (ENOB) is derived from the SINAD data. ENOB is calculated from: ENOB = (SINAD - 1.76 + VCORR)/6.02, where: VCORR = 0.5dB. Total Harmonic Distortion (THD) THD is the ratio of the RMS sum of the first 5 harmonic com- ponents to the RMS value of the measured input signal. Operating and Handling Considerations HANDLING All inputs and outputs of CMOS devices have a network for electrostatic protection during handling. Recommended han- dling practices for CMOS devices are described in lCAN-6525. “Guide to Better Handling and Operation of CMOS Integrated Circuits.” OPERATING Operating Voltage During operation near the maximum supply voltage limit, care should be taken to avoid or suppress power supply turn-on and turn-off transients, power supply ripple, or ground noise; any of these conditions must not cause the power supply volt- ages to exceed the absolute maximum rating. Input Signals To prevent damage to the input protection circuit, input signals should never be greater than VDD or VAA+ nor less than VSS or VAA- (depending upon which supply the protection network is referenced. See Maximum Ratings). Input currents must not exceed 20mA even when the power supply is off. Unused Inputs A connection must be provided at every input terminal. All unused input terminals must be connected to either VDD or VSS, whichever is appropriate. Output Short Circuits Shorting of outputs to any supply potential may damage CMOS devices by exceeding the maximum device dissipation. FIGURE 13. TYPICAL HI3304 5-BIT CONFIGURATION FIGURE 14. IDEAL TRANSFER CURVE VAA+ VREF+ VIN VREF- VAA- DC CE2 CLK CE1 VSS OF B4 B3 B2 B1 NC NC NC +5V HI3304 HI3304 ADJUST CENTER +5V 1k Ω BUFFER INPUT +FULL +5V CLOCK B5 MSB B4 B3 B2 B1 CLK VDD VAA+ VDD VREF+ VIN VREF- VAA- VSS DC CE2 CE1 OF B4 B3 B2 B1 INPUT SCALE REF. 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 OVERFLOW INPUT VOLTAGE V0 V1 V2 V3 V4 V5 V6 V7 V8 V9 V10 V11V12 V13 V14V15V16 HI3304 HI3304 |
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