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13 FIGURE 14A. FIGURE 14B. FIGURE 14. DIGITAL OUTPUT CURRENT TEST CIRCUIT Typical Application Circuits FIGURE 15. INPUT CLAMP APPLICATION (INTERNAL REFERENCE USED) Test Circuits (Continued) VRT VIN VRB CLK OE GND VDD 0.6V 2.6V VOL IOL + - VRT VIN VRB CLK OE GND VDD 0.6V 2.6V VOH IOH + - 17 18 19 20 21 22 23 24 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 25 26 27 28 29 30 31 32 74ACO4 CLOCK IN LATCH CK Q 0.01 µF 0.1 µF 10pF VREF CLAMP PULSE IN +5V (ANALOG) D7 D6 D5 D4 D3 D2 D1 D0 0.1 µF + 5V (DIGITAL) 0.01 µF GND (ANALOG) GND (DIGITAL) 0.01 µF 75 Ω + 10 µF 20K VIDEO IN 1k - + HA5020 +5V (ANALOG) 1k HI1179 |
