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AM29LV200B_06 Datasheet(PDF) 5 Page - Advanced Micro Devices

Part No. AM29LV200B_06
Description  2 Megabit (256 K x 8-Bit/128 K x 16-Bit) CMOS 3.0 Volt-only Boot Sector Flash Memory
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Maker  AMD [Advanced Micro Devices]
Homepage  http://www.amd.com
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October 10, 2006 21521D6
Am29LV200B
3
D A TA SH EE T
TABLE OF CONTENTS
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Special Handling Instructions ................................................... 6
Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 1. Am29LV200B Device Bus Operations ................................ 9
Word/Byte Configuration .......................................................... 9
Requirements for Reading Array Data ..................................... 9
Writing Commands/Command Sequences .............................. 9
Program and Erase Operation Status .................................... 10
Standby Mode ........................................................................ 10
Automatic Sleep Mode ................................................................10
RESET#: Hardware Reset Pin ...................................................10
Output Disable Mode .............................................................. 11
Table 2. Am29LV200BT Top Boot Block Sector Address Table..... 11
Table 3. Am29LV200BB Bottom Boot Block Sector Address Table 11
Autoselect Mode ..................................................................... 11
Table 4. Am29LV200B Autoselect Codes (High Voltage Method).. 12
Sector Protection/Unprotection ............................................... 12
Temporary Sector Unprotect .................................................. 12
Figure 1. In-System Sector Protect/Unprotect Algorithms ...............13
Figure 2. Temporary Sector Unprotect Operation ...........................14
Hardware Data Protection ...................................................... 14
Low VCC Write Inhibit .............................................................. 14
Write Pulse “Glitch” Protection ............................................... 14
Logical Inhibit .......................................................................... 14
Power-Up Write Inhibit ............................................................ 14
Reading Array Data ................................................................ 15
Reset Command ..................................................................... 15
Autoselect Command Sequence ............................................ 15
Word/Byte Program Command Sequence ............................. 15
Unlock Bypass Command Sequence ..................................... 16
Figure 3. Program Operation ..........................................................16
Chip Erase Command Sequence ........................................... 16
Sector Erase Command Sequence ........................................ 17
Erase Suspend/Erase Resume Commands ........................... 17
Figure 4. Erase Operation ...............................................................18
Command Definitions ............................................................. 19
Table 5. Am29LV200B Command Definitions................................. 19
DQ7: Data# Polling ................................................................. 20
Figure 5. Data# Polling Algorithm ...................................................20
RY/BY#: Ready/Busy# ........................................................... 21
DQ6: Toggle Bit I .................................................................... 21
DQ2: Toggle Bit II ................................................................... 21
Reading Toggle Bits DQ6/DQ2 ............................................... 21
DQ5: Exceeded Timing Limits ................................................ 22
DQ3: Sector Erase Timer ....................................................... 22
Figure 6. Toggle Bit Algorithm ........................................................ 22
Table 6. Write Operation Status..................................................... 23
Operating Ranges . . . . . . . . . . . . . . . . . . . . . . . . . 24
Extended (E) Devices ............................................................. 24
VCC Supply Voltages .............................................................. 24
Figure 9. ICC1 Current vs. Time (Showing Active and Automatic
Sleep Currents) .............................................................................. 26
Figure 10. Typical ICC1 vs. Frequency ........................................... 26
Figure 11. Test Setup ..................................................................... 27
Table 7. Test Specifications ........................................................... 27
Key to Switching Waveforms. . . . . . . . . . . . . . . . 27
Figure 12. Input Waveforms and Measurement Levels ................. 27
Read Operations .................................................................... 28
Figure 13. Read Operations Timings ............................................. 28
Hardware Reset (RESET#) .................................................... 29
Figure 14. RESET# Timings .......................................................... 29
Word/Byte Configuration (BYTE#) ........................................ 30
Figure 15. BYTE# Timings for Read Operations ............................ 30
Figure 16. BYTE# Timings for Write Operations ............................ 30
Erase/Program Operations ..................................................... 31
Figure 17. Program Operation Timings .......................................... 32
Figure 18. Chip/Sector Erase Operation Timings .......................... 33
Figure 19. Data# Polling Timings (During Embedded Algorithms) . 34
Figure 20. Toggle Bit Timings (During Embedded Algorithms) ...... 34
Figure 21. DQ2 vs. DQ6 ................................................................. 35
Temporary Sector Unprotect .................................................. 35
Figure 22. Temporary Sector Unprotect Timing Diagram .............. 35
Figure 23. Sector Protect/Unprotect Timing Diagram .................... 36
Alternate CE# Controlled Erase/Program Operations ............ 37
Figure 24. Alternate CE# Controlled Write Operation Timings ...... 38
Latchup Characteristics . . . . . . . . . . . . . . . . . . . . 39
TSOP and SO Pin Capacitance . . . . . . . . . . . . . . 39
Data Retention. . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
TS 048—48-Pin Standard TSOP ............................................ 40
SO 044—44-Pin Small Outline Package ................................ 41
FBA048—48-Ball Fine-Pitch Ball Grid Array, 0.80 mm pitch,
6 x 8 mm package .................................................................. 42



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