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HI-1575PCTF Datasheet(PDF) 3 Page - Holt Integrated Circuits |
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HI-1575PCTF Datasheet(HTML) 3 Page - Holt Integrated Circuits |
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3 / 12 page  HI-1575 HOLT INTEGRATED CIRCUITS 3 CLK Decoder A 6 5 3 2 4 30 10 9 31 13-20, 22-29 1 Decoder B Encoder STRB R/W CHA/CHB SYNC DATABUS VDD RCVA 21 GND FIGURE 1. HI-1575 BLOCK DIAGRAM To transmit contiguous words, a second write to the TX register must occur no earlier than 3.5 us and no later than 18.5 us after the first TX write. SAM bit 15 (SENDDATA) is high during this period and may be used as a flag to indicate when the HI-1575 is ready to accept the next data write for contiguous transmission. When transmitting a message of three or more words, the third and subsequent write operations should occur every 20.0 us so as to avoid over-writing the previous data before it is transferred to the transmitter's shift register. Figure 3 shows a timing diagram for transmit operations. The transmitter outputs are either direct or transformer coupled to the MIL-STD-1553 data bus. Both coupling methods produce a nominal voltage on the main MIL-STD-1553 bus of 7.5 volts peak-to-peak, line-to-line. Figure 6 shows bus coupling examples. One or both transmitters may be disabled by writing a '1' into SAM register bits 0 or 1 (TXDISA, TXDISB). When dis- abled, the host interface works as normal, but there is no output from the BUSA and (BUSB and ) pins. BUSA BUSB RECEIVER The HI-1575's two receivers continuously monitor both MIL-STD-1553 data busses. Bi-phase differential data words are accepted from the MIL-STD-1553 bus through the same direct or transformer coupled interface as the transmitter. Each receiver’s differential input stage drives a filter and threshold comparator that presents data to the decoders. The decoder logic checks the incoming word for correct encoding, bit count and parity. If a valid MIL-STD-1553 word is received, the RCVA or RCVB output goes high and the 16-bit received word is transferred to the RXA or RXB register. The HI-1575 ERROR output goes high whenever an encoding error is detected on either bus. If a received word has an encoding error, then SAM bits 10 or 14 (ERRORA, ERRORB) are set high, and the corresponding RCVA or RCVB pin is not asserted. To minimize the number of pins necessary to interface the HI-1575, the state of RCVA and RCVB can also be read from SAM bits 7 and 11. HOLT INTEGRATED CIRCUITS 3 7 RCVB 11 MR BUSA BUSA BUSB BUSB 12 ERROR 32 6 10 |
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