25

40

Chip Positive Supply

36

Chip Negative Supply

NOTES:

1. For Design reference only, not 100% tested.

2. CS has a special “mid-level” sense circuit that establishes a test mode if it is held near 3V for several ms. Inadvertent triggering of this

mode can be avoided by pulling it high when inactive, or ensuring frequent activity.

Terminal Definitions

TERMINAL

PIN NO.

DESCRIPTION

FUNCTION

Timing Diagrams

FIGURE 1. ICM7231 INPUT TIMING DIAGRAM

DO NOT CARE

CS

INPUT

DATA

ADDRESS

INPUT

ADDRESS

AND DATA

INPUTS VALID

ADDRESS

AND DATA

INPUTS VALID

ICM7231, ICM7232