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HI1-0539-5 Datasheet(PDF) 9 Page - Intersil Corporation |
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HI1-0539-5 Datasheet(HTML) 9 Page - Intersil Corporation |
9 / 12 page 9 Provide Path For IBIAS The input bias current for any DC-coupled amplifier must have an external path back to the amplifier’s power supply. No such path exists in Figure 8A, and consequently the amplifier output will remain in saturation. A single large resistor (1M Ω to 10MΩ) from either signal line to power supply common will provide the required path, but a resistor on each line is necessary to preserve accuracy. A single pair of these bias current resistors on the HI-539 output may be used if their loading effect can be tolerated (each forms a voltage divider with rON). Otherwise, a resistor pair on each input channel of the multiplexer is required. The use of bias current resistors is acceptable only if one is confident that the sum of signal plus common-mode voltage will remain within the input range of the multiplexer/amplifier combination. Another solution is to simply run a third wire from the low side of the signal source, as in Figure 8B. This wire assures a low common-mode voltage as well as providing the path for bias currents. Making the connection near the multiplexer will save wire, but it will also unbalance the line and reduce the amplifier's common-mode rejection. Differential Offset, ∆VOS There are two major sources of ∆VOS. That part due to the expression (rON ∆lD(ON) + lD(ON) ∆rON) becomes significant with increasing temperature, as shown in the Electrical Specifications tables. The other source of offset is the thermocouple effects due to dissimilar materials in the signal path. These include silicon, aluminum, tin, nickel-iron and (often) gold, just to exit the package. For the thermocouple effects in the package alone, the constraint on ∆VOS may be stated in terms of a limit on the difference in temperature for package pins leading to any channel of the Hl-539. For example, a difference of 0.13oC produces a 5 µV offset. Obviously, this ∆T effect can dominate the ∆V OS parameter at any temperature unless care is taken in mounting the Hl-539 package. Temperature gradients across the Hl-539 package should be held to a minimum in critical applications. Locate the Hl- 539 far from heat producing components, with any air currents flowing lengthwise across the package. TABLE 1. WIRE GAGE EQUIVALENT WIDTH OF P.C. CONDUCTOR (2 oz. Cu) DC RESISTANCE PER FOOT INDUCTANCE PER FOOT IMPEDANCE PER FOOT 60Hz 10kHz 18 0.47” 0.0064 Ω 0.36 µH 0.0064 Ω 0.0235 Ω 20 0.30” 0.0102 Ω 0.37 µH 0.0102 Ω 0.0254 Ω 22 0.19” 0.0161 Ω 0.37 µH 0.0161 Ω 0.0288 Ω 24 0.12” 0.0257 Ω 0.40 µH 0.0257 Ω 0.0345 Ω 26 0.075” 0.041 Ω 0.42 µH 0.041 Ω 0.0488 Ω 28 0.047” 0.066 Ω 0.45 µH 0.066 Ω 0.0718 Ω 30 0.029” 0.105 Ω 0.49 µH 0.105 Ω 0.110 Ω 32 0.018” 0.168 Ω 0.53 µH 0.168 Ω 0.171 Ω HI-539 |
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