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LAN91C96I Datasheet(PDF) 7 Page - SMSC Corporation |
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LAN91C96I Datasheet(HTML) 7 Page - SMSC Corporation |
7 / 109 page Non-PCI Single-Chip Full Duplex Ethernet Controller SMSC DS – LAN91C96I Page 7 Rev. 03-28-07 DATASHEET THE LAN91C96I OFFERS: High integration: Single chip controller including: Packet RAM Local Bus interface EEPROM interface Encoder/decoder with AUI interface 10BASE-T transceiver High performance: Chained ("Back-to-back") packet handling with no CPU intervention: Queues transmit packets Queues receive packets Stores results in memory along with packet Queues interrupts Optional single interrupt upon completion of transmit chain Fast block move operation for load/unload: CPU sees packet bytes as if stored continuously. Handles 16 bit transfers regardless of address alignment. Access to packet through fixed window. Fast bus interface: Compatible with Local Bus type and faster buses. Flexibility: Flexible packet and header processing: Can be set to Simultasking - Early Receive and Transmit modes. With enhanced Early Receive functions. Can access any byte in the packet. Can immediately remove undesired packets from queue. Can move packets from receive to transmit queue. |
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