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ICM7555CN Datasheet(PDF) 2 Page - NXP Semiconductors |
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ICM7555CN Datasheet(HTML) 2 Page - NXP Semiconductors |
2 / 9 page Philips Semiconductors Linear Products Product specification ICM7555 General purpose CMOS timer August 31, 1994 338 EQUIVALENT BLOCK DIAGRAM NOTE: UNUSED INPUTS SHOULD BE CONNECTED TO APPROPRIATE VOLTAGE FROM TRUTH TABLE. V DD 8 R 6 5 2 R 1 R COMPARATOR A COMPARATOR B FLIP–FLOP RESET 4 OUTPUT DRIVERS 3 OUTPUT DISCHARGE 7 N 1 + – + – THRESHOLD CONTROL VOLTAGE TRIGGER TRUTH TABLE THRESHOLD VOLTAGE TRIGGER VOLTAGE RESET1 OUTPUT DISCHARGE SWITCH DON’T CARE DON’T CARE LOW LOW ON >2/3(V+) > 1/3(V+) HIGH LOW ON VTH < 2/3 VTR > 1/3 HIGH STABLE STABLE DON’T CARE <1/3(V+) HIGH HIGH OFF NOTES: 1. RESET will dominate all other inputs: TRIGGER will dominate over THRESHOLD. ABSOLUTE MAXIMUM RATINGS1 SYMBOL PARAMETER RATING UNITS VDD Supply voltage +18 V VTRIG1 Trigger input voltage VCV Control voltage > -0.3 to VTH Threshold input voltage <VDD + 0.3 V VRST RESET input voltage IOUT Output current 100 mA PDMAX Maximum power dissipation, TA = 25°C (still air)2 N package 1160 mW D package 780 mW TSTG Storage temperature range -65 to +150 °C TSOLD Lead temperature (Soldering 60s) 300 °C NOTES: 1. Due to the SCR structure inherent in the CMOS process used to fabricate these devices, connecting any terminal to a voltage greater than VDD + 0.3V or less than GND -0.3V may cause destructive latch-up. For this reason it is recommended that no inputs from external sources not operating from the same power supply be applied to the device before its power supply is established. In multiple systems, the supply of the ICM7555 must be turned on first. 2. Derate above 25 °C, at the following rates: N package at 9.3mW/ °C D package at 6.2mW/ °C 3. See “Power Dissipation Considerations” section. |
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