Electronic Components Datasheet Search |
|
HS9-82C37ARH-Q Datasheet(PDF) 4 Page - Intersil Corporation |
|
HS9-82C37ARH-Q Datasheet(HTML) 4 Page - Intersil Corporation |
4 / 21 page 4 AC Test Circuit AC Testing Input, Output Waveforms HRQ 10 O Hold Request: The Hold Request (HRQ) output is used to request control of the system bus. When a DREQ occurs and the corresponding mask bit is clear, or a software DMA request is made, the HS-82C37ARH issues HRQ. The HLDA signal then informs the controller when access to the system busses is permitted. For stand-alone operation where the HS-82C37ARH always controls the busses, HRQ may be tied to HLDA. This will result in one S0 state before the transfer. DACK0- DACK3 14,15, 24, 25 O DMA Acknowledge: DMA acknowledge is used to notify the individual peripherals when one has been granted a DMA cycle. The sense of these lines is programmable. Reset initializes them to active low. AEN 9 O Address Enable: Address Enable enables the 8-bit latch containing the upper 8 address bits onto the system address bus. AEN can also be used to disable other system bus drivers during DMA transfers. AEN is active HIGH. ADSTB 8 O Address Strobe: This is an active high signal used to control latching of the upper address byte. It will drive directly the strobe input of external transparent octal latches, such as the 82C82. During block operations, ADSTB will only be issued when the upper address byte must be updated, thus speeding operation through elimination of S1 states. (See Note 2). MEMR 3 O Memory Read: The Memory Read signal is an active low three-state output used to access data from the selected memory location during a DMA Read or a Memory-to-Memory transfer. MEMW 4 O Memory Write: The Memory Write is an active low three-state output used to write data to the selected memory location during a DMA Write or a Memory-to-Memory transfer. NC 5 No connect. Pin 5 is open and should not be tested for continuity. Pin Descriptions (Continued) SYMBOL PIN NUMBER TYPE DESCRIPTION TEST CONDITION DEFINITION TABLE PINS V1 R1 C1 All Output Except EOP 1.7V 510 Ω 100pF EOP VDD 1.6k Ω 50pF V1 OUTPUT FROM DEVICE UNDER TEST R1 TEST POINT C1 † †Includes Stray and Jig Capacitance VDD -1.5V VIL -0.4V INPUT 1.5V VOH VOL OUTPUT OUTPUT Z L OR H VOH VOL 2.0V 0.8V VOH - 0.45V 0.45 L OR H Z VOH HS-82C37ARH |
Similar Part No. - HS9-82C37ARH-Q |
|
Similar Description - HS9-82C37ARH-Q |
|
|
Link URL |
Privacy Policy |
ALLDATASHEET.COM |
Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Datasheet Upload | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |