ICM7170_03 datasheet(4/14 Pages) INTERSIL

Part #	ICM7170

Description	Microprocessor-Compatible, Real-Time짰lock

Download	14 Pages

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Manufacturer	INTERSIL [Intersil Corporation]

Direct Link	http://www.intersil.com/cda/home

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4

AC Electrical Specifications

TA = -40

oC to 85oC, V

DD = +5V ± 10%, VBACKUP = VDD,

D0 - D7 Load Capacitance = 150pF, VIL = 0.4V, VlH = 2.8V, Unless Otherwise Specified

PARAMETER

MIN

MAX

UNITS

READ CYCLE TIMING

READ to DATA Valid, tRD

-

250

ns

ADDRESS Valid to DATA Valid, tACC

-

300

ns

READ Cycle Time, tCYC

400

-

ns

Read High Time, tRH

150

-

ns

RD High to Bus Three-State, tRH

-

25

ns

ADDRESS to READ Set Up Time, tAS

50

-

ns

ADDRESS HOLD Time After READ, tAR

0

-

ns

WRITE CYCLE TIMING

ADDRESS Valid to WRITE Strobe, tAD

50

-

ns

ADDRESS Hold Time for WRITE, tWA

0

-

ns

WRITE Pulse Width, Low, tWL

100

-

ns

WRITE High Time, tWH

300

-

ns

DATA IN to WRITE Set Up Time, tDW

100

-

ns

DATA IN Hold Time After WRITE, tWD

30

-

ns

WRITE Cycle Time, tCYC

400

-

ns

MULTIPLEXED MODE TIMING

ALE Pulse Width, High, tLL

50

-

ns

ADDRESS to ALE Set Up Time, tAL

30

-

ns

ADDRESS Hold Time After ALE, tLA

30

-

ns

Timing Diagrams

FIGURE 1. READ CYCLE TIMING FOR NON-MULTIPLEXED BUS (ALE = VIH, WR = VIH)

A0 - A4, CS

RD

D0 - D7

ADDRESS VALID, CS LOW

tAR

OUTPUT DATA VALID

tACC

tRD

tAS

tRX

tCYC

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