January 1995

2

Philips Semiconductors

Product specification

8-stage shift-and-store bus register

HEF4094B

MSI

DESCRIPTION

The HEF4094B is an 8-stage serial shift register having a

storage latch associated with each stage for strobing data

from the serial input to parallel buffered 3-state outputs

to common bus lines. Data is shifted on positive-going

clock transitions. The data in each shift register stage is

transferred to the storage register when the strobe (STR)

input is HIGH. Data in the storage register appears at the

outputs whenever the output enable (EO) signal is HIGH.

positive-going clock edges to allow high-speed operation

in cascaded systems in which the clock rise time is fast.

negative-going clock edge and provides cascading

HEF4094B devices when the clock rise time is slow.

Fig.1 Functional diagram.

PINNING

See Family Specifications

HEF4094BP(N): 16-lead DIL; plastic

(SOT38-1)

HEF4094BD(F): 16-lead DIL; ceramic (cerdip)

(SOT74)

HEF4094BT(D): 16-lead SO; plastic

(SOT109-1)

( ): Package Designator North America

D

data input

EO

output enable input

CP

clock input

serial outputs

STR

strobe input

parallel outputs

Fig.2 Pinning diagram.