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ICL7650SCBA-1T Datasheet(PDF) 4 Page - Intersil Corporation |
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ICL7650SCBA-1T Datasheet(HTML) 4 Page - Intersil Corporation |
4 / 13 page 4 FN2920.10 April 12, 2007 Test Circuit Application Information Detailed Description AMPLIFIER The functional diagram shows the major elements of the ICL7650S. There are two amplifiers, the main amplifier, and the nulling amplifier. Both have offset-null capability. The main amplifier is connected continuously from the input to the output, while the nulling amplifier, under the control of the chopping oscillator and clock circuit, alternately nulls itself and the main amplifier. The nulling connections, which are MOSFET gates, are inherently high impedance, and two external capacitors provide the required storage of the nulling potentials and the necessary nulling-loop time constants. The nulling arrangement operates over the full common-mode and power-supply ranges, and is also independent of the output level, thus giving exceptionally high CMRR, PSRR, and AVOL. Careful balancing of the input switches, and the inherent balance of the input circuit, minimizes chopper frequency charge injection at the input terminals, and also the feed forward-type injection into the compensation capacitor, which is the main cause of output spikes in this type of circuit. INTERMODULATION Previous chopper-stabilized amplifiers have suffered from intermodulation effects between the chopper frequency and input signals. These arise because the finite AC gain of the amplifier necessitates a small AC signal at the input. This is seen by the zeroing circuit as an error signal, which is chopped and fed back, thus injecting sum and difference frequencies and causing disturbances to the gain and phase vs frequency characteristics near the chopping frequency. These effects are substantially reduced in the ICL7650S by feeding the nulling circuit with a dynamic current, corresponding to the compensation capacitor current, in such a way as to cancel that portion of the input signal due to finite AC gain. Since that is the major error contribution to the ICL7650S, the intermodulation and gain/phase disturbances are held to very low values, and can generally be ignored. CAPACITOR CONNECTION The null/storage capacitors should be connected to the CEXTA and CEXTB pins, with a common connection to the CRETN pin. This connection should be made directly by either a separate wire or PC trace to avoid injecting load current IR drops into the capacitive circuitry. The outside foil, where available, should be connected to CRETN. OUTPUT CLAMP The OUTPUT CLAMP pin allows reduction of the overload recovery time inherent with chopper-stabilized amplifiers. When tied to the inverting input pin, or summing junction, a current path between this point and the OUTPUT pin occurs just before the device output saturates. Thus uncontrolled input differentials are avoided, together with the consequent charge buildup on the correction-storage capacitors. The output swing is slightly reduced. Output Source Current IO SOURCE +25 2.9 4.5 - mA 0 to +70 2.3 - - mA Output Sink Current IO SINK +2525 30- mA 0 to +70 20 - - mA Internal Chopping Frequency fCH Pins 13 and 14 Open +25 120 250 375 Hz Clamp ON Current (Note 5) RL = 100kΩ +2525 70- μA Clamp OFF Current (Note 5) -4V ≤ VOUT ≤ +4V +25 - 0.001 5 nA 0 to +70 - - 10 nA NOTES: 3. These parameters are guaranteed by design and characterization, but not tested at temperature extremes because thermocouple effects prevent precise measurement of these voltages in automatic test equipment. 4. OUTPUT CLAMP not connected. See typical characteristic curves for output swing vs clamp current characteristics. 5. See OUTPUT CLAMP under detailed description. 6. All significant improvements over the industry-standard ICL7650 are highlighted in bold italics. Electrical Specifications VSUPPLY = ±5V. See Test Circuit, Unless Otherwise Specified (Continued) PARAMETER SYMBOL TEST CONDITIONS TEMP. (°C) MIN TYP MAX UNITS ICL7650S + - OUTPUT R2 1M Ω C CR 0.1 μF0.1μF C R1 1M Ω |
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