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HEF4094BP Datasheet(PDF) 5 Page - NXP Semiconductors |
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HEF4094BP Datasheet(HTML) 5 Page - NXP Semiconductors |
5 / 7 page January 1995 5 Philips Semiconductors Product specification 8-stage shift-and-store bus register HEF4094B MSI AC CHARACTERISTICS VSS = 0 V; Tamb =25 °C; CL = 50 pF; input transition times ≤ 20 ns VDD V SYMBOL TYP. MAX. TYPICAL EXTRAPOLATION FORMULA Propagation delays CP → Os 5 135 270 ns 108 ns + (0,55 ns/pF) CL HIGH to LOW 10 tPHL 65 130 ns 54 ns + (0,23 ns/pF) CL 15 50 100 ns 42 ns + (0,16 ns/pF) CL 5 105 210 ns 78 ns + (0,55 ns/pF) CL LOW to HIGH 10 tPLH 50 100 ns 39 ns + (0,23 ns/pF) CL 15 40 80 ns 32 ns + (0,16 ns/pF) CL CP → O’s 5 105 210 ns 78 ns + (0,55 ns/pF) CL HIGH to LOW 10 tPHL 50 100 ns 39 ns + (0,23 ns/pF) CL 15 40 80 ns 32 ns + (0,16 ns/pF) CL 5 105 210 ns 78 ns + (0,55 ns/pF) CL LOW to HIGH 10 tPLH 50 100 ns 39 ns + (0,23 ns/pF) CL 15 40 80 ns 32 ns + (0,16 ns/pF) CL CP → On 5 165 330 ns 138 ns + (0,55 ns/pF) CL HIGH to LOW 10 tPHL 75 150 ns 64 ns + (0,23 ns/pF) CL 15 55 110 ns 47 ns + (0,16 ns/pF) CL 5 150 300 ns 123 ns + (0,55 ns/pF) CL LOW to HIGH 10 tPLH 70 140 ns 59 ns + (0,23 ns/pF) CL 15 55 110 ns 47 ns + (0,16 ns/pF) CL STR → On 5 110 220 ns 83 ns + (0,55 ns/pF) CL HIGH to LOW 10 tPHL 50 100 ns 39 ns + (0,23 ns/pF) CL 15 35 70 ns 27 ns + (0,16 ns/pF) CL 5 100 200 ns 73 ns + (0,55 ns/pF) CL LOW to HIGH 10 tPLH 45 90 ns 34 ns + (0,23 ns/pF) CL 15 35 70 ns 27 ns + (0,16 ns/pF) CL Output transition times 5 60 120 ns 10 ns + (1,0 ns/pF) CL HIGH to LOW 10 tTHL 30 60 ns 9 ns + (0,42 ns/pF) CL 15 20 40 ns 6 ns + (0,28 ns/pF) CL 5 60 120 ns 10 ns + (1,0 ns/pF) CL LOW to HIGH 10 tTLH 30 60 ns 9 ns + (0,42 ns/pF) CL 15 20 40 ns 6 ns + (0,28 ns/pF) CL |
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