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DESCRIPTION/ORDERING INFORMATION (CONTINUED)

PCA9555

WITH INTERRUPT OUTPUT AND CONFIGURATION REGISTERS

SCPS131D – AUGUST 2005 – REVISED OCTOBER 2006

clock (SCL), serial data (SDA)].

The PCA9555 consists of two 8-bit Configuration (input or output selection), Input Port, Output Port, and Polarity

Inversion (active high or active low operation) registers. At power on, the I/Os are configured as inputs. The

system master can enable the I/Os as either inputs or outputs by writing to the I/O configuration bits. The data

for each input or output is kept in the corresponding Input or Output register. The polarity of the Input Port

register can be inverted with the Polarity Inversion register. All registers can be read by the system master.

The system master can reset the PCA9555 in the event of a timeout or other improper operation by utilizing the

machine.

The PCA9555 open-drain interrupt (INT) output is activated when any input state differs from its corresponding

Input Port register state and is used to indicate to the system master that an input state has changed.

INT can be connected to the interrupt input of a microcontroller. By sending an interrupt signal on this line, the

remote I/O can inform the microcontroller if there is incoming data on its ports without having to communicate via

The device outputs (latched) have high-current drive capability for directly driving LEDs.

enhancements.

The PCA9555 is identical to the PCA9535, except for the inclusion of the internal I/O pullup resistor, which pulls

the I/O to a default high when configured as an input and undriven.

PCF8575, PCF8575C, and PCF8574, allowing up to eight of these devices in any combination to share the

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