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PCA9545ADGVR Datasheet(PDF) 7 Page - Texas Instruments |
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PCA9545ADGVR Datasheet(HTML) 7 Page - Texas Instruments |
7 / 28 page www.ti.com RESET Input Power-On Reset Voltage Translation 2 Maximum Typical Minimum VCC (V) 4.5 4 3.5 3 2.5 5 5.5 1 5 4.5 4 3.5 3 2.5 2 1.5 I2C Interface PCA9545A 4-CHANNEL I2C AND SMBus SWITCH WITH INTERRUPT LOGIC AND RESET FUNCTIONS SCPS147C – OCTOBER 2005 – REVISED OCTOBER 2006 The RESET input can be used to recover the PCA9545A from a bus-fault condition. The registers and the I2C state machine within this device initialize to their default states if this signal is asserted low for a minimum of tWL. All channels also are deselected in this case. RESET must be connected to VCC through a pullup resistor. When power is applied to VCC, an internal power-on reset holds the PCA9545A in a reset condition until VCC has reached VPOR. At this point, the reset condition is released and the PCA9545A registers and I 2C state machine are initialized to their default states, all zeroes, causing all the channels to be deselected. Thereafter, VCC must be lowered below 0.2 V to reset the device. The pass-gate transistors of the PCA9545A are constructed such that the VCC voltage can be used to limit the maximum voltage that is passed from one I2C bus to another. Figure 3 shows the voltage characteristics of the pass-gate transistors (note that the graph was generated using data specified in the electrical characteristics section of this data sheet). In order for the PCA9545A to act as a voltage translator, the Vpass voltage must be equal to or lower than the lowest bus voltage. For example, if the main bus is running at 5 V and the downstream buses are 3.3 V and 2.7 V, Vpass must be equal to or below 2.7 V to effectively clamp the downstream bus voltages. As shown in Figure 3, Vpass (max) is at 2.7 V when the PCA9545A supply voltage is 3.5 V or lower, so the PCA9545A supply voltage could be set to 3.3 V. Pullup resistors then can be used to bring the bus voltages to their appropriate levels (see Figure 13). Figure 3. Vpass Voltage vs VCC The I2C bus is for two-way two-line communication between different ICs or modules. The two lines are a serial data line (SDA) and a serial clock line (SCL). Both lines must be connected to a positive supply via a pullup resistor when connected to the output stages of a device. Data transfer can be initiated only when the bus is not busy. One data bit is transferred during each clock pulse. The data on the SDA line must remain stable during the high period of the clock pulse, as changes in the data line at this time are interpreted as control signals (see Figure 4). 7 Submit Documentation Feedback |
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