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PCA9536D Datasheet(PDF) 7 Page - Texas Instruments |
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PCA9536D Datasheet(HTML) 7 Page - Texas Instruments |
7 / 25 page www.ti.com Register Descriptions Power-On Reset PCA9536 REMOTE 4-BIT I2C AND SMBus I/O EXPANDER WITH CONFIGURATION REGISTERS SCPS125C – APRIL 2006 – REVISED NOVEMBER 2006 The Input Port register (register 0) reflects the incoming logic levels of the pins, regardless of whether the pin is defined as an input or an output by the Configuration register. It only acts on read operation. Writes to these registers have no effect. The default value, X, is determined by the externally applied logic level. Before a read operation, a write transmission is sent with the command byte to instruct the I2C device that the Input Port register will be accessed next. Register 0 (Input Port Register) I7 I6 I5 I4 BIT I3 I2 I1 I0 Not Used DEFAULT 1 1 1 1 X X X X The Output Port register (register 1) shows the outgoing logic levels of the pins defined as outputs by the Configuration register. Bit values in this register have no effect on pins defined as inputs. In turn, reads from this register reflect the value that is in the flip-flop controlling the output selection, not the actual pin value. Register 1 (Output Port Register) O7 O6 O5 O4 BIT O3 O2 O1 O0 Not Used DEFAULT 1 1 1 1 1 1 1 1 The Polarity Inversion register (register 2) allows polarity inversion of pins defined as inputs by the Configuration register. If a bit in this register is set (written with 1), the corresponding port pin's polarity is inverted. If a bit in this register is cleared (written with a 0), the corresponding port pin's original polarity is retained. Register 2 (Polarity Inversion Register) N7 N6 N5 N4 BIT N3 N2 N1 N0 Not Used DEFAULT 0 0 0 0 0 0 0 0 The Configuration register (register 3) configures the directions of the I/O pins. If a bit in this register is set to 1, the corresponding port pin is enabled as an input with high-impedance output driver. If a bit in this register is cleared to 0, the corresponding port pin is enabled as an output. Register 3 (Configuration Register) C7 C6 C5 C4 BIT C3 C2 C1 C0 Not Used DEFAULT 1 1 1 1 1 1 1 1 When power (from 0 V) is applied to VCC, an internal power-on reset holds the PCA9536 in a reset condition until VCC has reached VPOR. At that time, the reset condition is released and the PCA9536 registers and I2C/SMBus state machine initialize to their default states. After that, VCC must be lowered to below 0.2 V and then back up to the operating voltage for a power-reset cycle. 7 Submit Documentation Feedback |
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