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HEF4044BT Datasheet(PDF) 2 Page - NXP Semiconductors |
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HEF4044BT Datasheet(HTML) 2 Page - NXP Semiconductors |
2 / 5 page January 1995 2 Philips Semiconductors Product specification Quadruple R/S latch with 3-state outputs HEF4044B MSI The HEF4044B is a quadruple R/S latch with 3-state outputs with a common output enable input (EO). Each latch has an active LOW set input (S0 to S3), an active LOW reset input (R0 to R3) and an active HIGH 3-state output (O0 to O3). When EO is HIGH, the state of the latch output (On) can be determined from the function table below. When EO is LOW, the latch outputs are in the high impedance OFF-state. EO does not affect the state of the latch. The high impedance off-state feature allows common busing of the outputs. Fig.1 Functional diagram. PINNING FUNCTION TABLE Notes 1. H = HIGH state (the more positive voltage) L = LOW state (the less positive voltage) X = state immaterial Z = high impedance OFF-state FAMILY DATA, IDD LIMITS category MSI See Family Specifications HEF4044BP(N): 16-lead DIL; plastic (SOT38-1) HEF4044BD(F): 16-lead DIL; ceramic (cerdip) (SOT74) HEF4044BT(D): 16-lead SO; plastic (SOT109-1) ( ): Package Designator North America EO common output enable input S0 to S3 set inputs (active LOW) R0 to R3 reset inputs (active LOW) O0 to O3 3-state buffered latch outputs INPUTS OUTPUT On EO Sn Rn LX X Z HL H H HX L L H H H latched Fig.2 Pinning diagram. |
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