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SN75LBC241 Datasheet(PDF) 4 Page - Texas Instruments |
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SN75LBC241 Datasheet(HTML) 4 Page - Texas Instruments |
4 / 10 page SN75LBC241 LOW-POWER LinBiCMOS MULTIPLE DRIVERS AND RECEIVERS SLLS137F – MAY 1992 – REVISED FEBRUARY 2001 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 electrical characteristics over recommended ranges of supply voltage and operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP† MAX UNIT VOH High level output voltage TOUT RL = 3 kΩ to GND, See Note 3 5 9 V VOH High-level output voltage ROUT IOH = –1 mA 3.5 V VOL Low level output voltage TOUT RL = 3 kΩ to GND, See Note 4 –9‡ –5 V VOL Low-level output voltage ROUT IOL = 3.2 mA 0.4 V VIT+ Receiver positive-going input threshold voltage RIN VCC = 5 V, TA = 25°C 1.7 2.4 V VIT– Receiver negative-going input threshold voltage RIN VCC = 5 V, TA = 25°C 0.8 1.2 V Vhys Input hysteresis voltage (VIT+ – VIT–) RIN VCC = 5 V 0.5 1 V ri Receiver input resistance RIN VCC = 5 V, TA = 25°C 3 5 7 k Ω ro Output resistance TOUT VDD = VSS = VCC = 0, VO = ±2 V 300 Ω IOS Short-circuit output current§ TOUT VCC = 5.5 V, VO = 0 ±10 mA IIS Short-circuit input current TIN VI = 0 200 µA ICC Supply current VCC = 5.5 V, TA = 25°C, All outputs open 4 8 mA ICC Supply current All outputs open, TA = 25°C, SHUTDOWN high 1 10 mA † All typical values are at VCC = 5 V, TA = 25°C. ‡ The algebraic convention, in which the least positive (most negative) value is designated minimum, is used in this data sheet for logic voltage levels only. § Not more than one output should be shorted at one time. NOTES: 3. Total IOH drawn from TOUT1, TOUT2, TOUT3, TOUT4, and VDD terminals should not exceed 12 mA. 4. Total IOL drawn from TOUT1, TOUT2, TOUT3, TOUT4, and VSS terminals should not exceed –12 mA. switching characteristics, VCC = 5 V, TA = 25°C PARAMETER TEST CONDITIONS MIN TYP MAX UNIT tPLH(R) Receiver propagation-delay time, low- to high-level output See Figure 1 500 ns tPHL(R) Receiver propagation-delay time, high- to low-level output See Figure 1 500 ns tPZH Receiver output-enable time to high level See Figure 4 100 ns tPZL Receiver output-enable time to low level See Figure 4 100 ns tPHZ Receiver output-disable time from high level See Figure 4 50 ns tPLZ Receiver output-disable time from low level See Figure 4 50 ns SR Driver slew rate RL = 3 kΩ to 7 kΩ, CL = 2500 pF, See Figure 3 30 V/ µs SR(tr) Driver transition-region slew rate RL = 3 kΩ to 7 kΩ, CL = 2500 pF, See Figure 3 4 6 V/ µs |
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