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HEF4013BDF Datasheet(PDF) 5 Page - NXP Semiconductors |
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HEF4013BDF Datasheet(HTML) 5 Page - NXP Semiconductors |
5 / 7 page January 1995 5 Philips Semiconductors Product specification Dual D-type flip-flop HEF4013B flip-flops AC CHARACTERISTI CS VSS =0V; Tamb =25 °C; CL = 50 pF; input transition times ≤ 20 ns VDD V SYMBOL MIN. TYP. MAX. Set-up time 5 40 20 ns see also waveforms Figs 4 and 5 D → CP 10 tsu 25 10 ns 15 15 5 ns Hold time 5 20 0 ns D → CP 10 thold 20 0 ns 15 15 0 ns Minimum clock 5 60 30 ns pulse width; LOW 10 tWCPL 30 15 ns 15 20 10 ns Minimum SD pulse 5 50 25 ns width; HIGH 10 tWSDH 24 12 ns 15 20 10 ns Minimum CD pulse 5 50 25 ns width; HIGH 10 tWCDH 24 12 ns 15 20 10 ns Recovery time 5 15 −5ns for SD 10 tRSD 15 0 ns 15 15 0 ns Recovery time 5 40 25 ns for CD 10 tRCD 25 10 ns 15 25 10 ns Maximum clock 5 7 14 MHz pulse frequency 10 fmax 14 28 MHz 15 20 40 MHz VDD V TYPICAL FORMULA FOR P ( µW) Dynamic power 5 850 fi +∑ (foCL) × VDD 2 where dissipation per 10 3 600 fi +∑ (foCL) × VDD 2 fi = input freq. (MHz) package (P) 15 9 000 fi +∑ (foCL) × VDD 2 fo = output freq. (MHz) CL = total load cap. (pF) ∑ (f oCL) = sum of outputs VDD = supply voltage (V) |
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