Electronic Components Datasheet Search |
|
FTT1010M Datasheet(PDF) 5 Page - NXP Semiconductors |
|
FTT1010M Datasheet(HTML) 5 Page - NXP Semiconductors |
5 / 17 page 1999 September 5 Philips Semiconductors Product specification Frame Transfer CCD Image Sensor FTT1010-M Specifications 1 During Charge Reset it is allowed to exceed maximum rating levels (see note5). 2 All voltages in relation to SFS. 3 To set the VNS voltage for optimal Vertical Anti-Blooming (VAB), it should be adjustable between minimum and maximum values. 4 Three-level clock is preferred for maximum charge; the swing during vertical transport should be 4V higher than the voltage during integration. A two level clock (typically 10V) can be used if a lower maximum charge handling capacity is allowed. 5 Charge Reset can be achieved in two ways: • The typical CR level is applied to all image clocks simultaneously (preferred). • The typical A-clock low level is applied to all image clocks; for proper CR, an additional Charge Reset pulse on VNS is required.This will also affect the charge handling capacity in the storage areas. DC CONDITIONS 2 MIN. [V] TYPICAL [V] MAX. [V] MAX. [mA] VNS 3 VPS SFD SFS VCS OG RD N substrate P substrate Source Follower Drain Source Follower Source Current Source Output Gate Reset Drain 18 1 16 - -5 4 13 24 3 20 0 0 6 15.5 28 7 24 - 3 8 18 15 15 4.5 1 - - - AC CLOCK LEVEL CONDITIONS 2 MIN. TYPICAL MAX. UNIT IMAGE CLOCKS: A-clock amplitude during integration and hold A-clock amplitude during vertical transport (duty cycle=5/8) 4 A-clock low level Charge Reset (CR) level on A-clock 5 8 10 -5 10 14 0 -5 V V V V STORAGE CLOCKS: B-clock amplitude during hold B-clock amplitude during vertical transport (duty cycle=5/8) 8 10 10 14 V V OUTPUT REGISTER CLOCKS: C-clock amplitude (duty cycle during hor. transport = 3/6) C-clock low level Summing Gate (SG) amplitude Summing Gate (SG) low level 4.75 2 5 3.5 10 3.5 5.25 10 V V V V OTHER CLOCKS: Reset Gate (RG) amplitude Reset Gate (RG) low level Charge Reset (CR) pulse on Nsub 5 5 0 10 3 10 10 10 V V V ABSOLUTE MAXIMUM RATINGS 1 MIN. MAX. UNIT GENERAL: storage temperature ambient temperature during operation voltage between any two gates DC current through any clock phase (absolute value) OUT current (no short circuit protection) -55 -40 -20 -0.2 0 +80 +60 +20 +2.0 10 °C °C V µA mA VOLTAGES IN RELATION TO VPS: VNS, SFD, RD VCS, SFS all other pins -0.5 -8 -5 +30 +5 +25 V V V VOLTAGES IN RELATION TO VNS: SFD, RD VCS, SFS, VPS all other pins -15 -30 -30 +0.5 +0.5 +0.5 V V V |
Similar Part No. - FTT1010M |
|
Similar Description - FTT1010M |
|
|
Link URL |
Privacy Policy |
ALLDATASHEET.COM |
Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Datasheet Upload | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |