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FAN5033 Datasheet(PDF) 8 Page - Fairchild Semiconductor |
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FAN5033 Datasheet(HTML) 8 Page - Fairchild Semiconductor |
8 / 39 page © 2006 Fairchild Semiconductor 2006 www.fairchildsemi.com FAN5033 Rev. 1.0.0 8 of 39 Electrical Characteristics (Continued) VCC = 12V, FBRTN = GND, and TA = +25°C. The • denotes specifications that apply over the full operating temperature range. Symbol Parameter Conditions Min. Typ. Max. Unit OD Output VOL(ODB) Output Voltage Low IPWM(SINK) = 400μA • 160 400 mV VOH(ODB) Output Voltage High IPWM(SOURCE) = 400μA • 4 5 V Power Good Comparator VPWRGD(UV) Under-Voltage Threshold Relative to Nominal DAC Output • -300 -250 -200 mV VPWRGD(OV) Over-Voltage Threshold Relative to Nominal DAC Output • 100 150 200 mV VOL(PWRGD) Output Low Voltage IPWRGD(SINK) = -4mA • 200 300 mV Start-up sequence • 2 ms VID code Changing • 250 µs tPWRGD Power Good Delay Time CDELAY = 10nF Power Good Blanking Time VID Code Static • 100 200 ns VCROWBAR Crowbar Trip Point Relative to Nominal DAC Output • 100 150 200 mV Crowbar Reset Point Relative to FBRTN • 250 300 350 mV VID code Change • 100 250 µs tCROWBAR Crowbar Delay Time Over-voltage to PWM going low Crowbar Blanking Time VID Code Static • 400 ns PWM Outputs VOL(VRTM) Output Voltage Low IPWM(SINK) = 400μA • 160 400 mV VOH(VRTM) Output Voltage High IPWM(SOURCE) = 400μA • 4 5 V Phase Disable Voltage Applicable to PWM3 pins only. Connect this pin to VCC to disable the phase. (3) • VCC -.1 V Input Supply VCC DC Supply Current EN = Logic HIGH • 8 12 mA VUVLO UVLO Threshold VCC rising • 6.5 6.9 7.3 V VULVOLHYS UVLO Hysteresis • 0.7 0.9 1.1 V Notes: 1. All limits at operating temperature extremes are guaranteed by design, characterization, and statistical quality control. 2. AC specifications guaranteed by design and characterization; not production tested. 3. To operate FAN5033 with fewer than three phases, PWM3 should be connected to VCC to disable this phase. See the “Theory of Operation” section for details. |
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