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SY89843UMGTR Datasheet(PDF) 4 Page - Micrel Semiconductor

Part # SY89843UMGTR
Description  Precision LVPECL Runt Pulse Eliminator 2:1 MUX with 1:2 Fanout and Internal Termination
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Manufacturer  MICREL [Micrel Semiconductor]
Direct Link  http://www.micrel.com
Logo MICREL - Micrel Semiconductor

SY89843UMGTR Datasheet(HTML) 4 Page - Micrel Semiconductor

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Micrel, Inc.
SY89843U
March 2005
4
M9999-031505
hbwhelp@micrel.com or (408) 955-1690
Pin Description
Pin Number
Pin Name
Pin Function
5, 2
23, 20
IN0, /IN0,
IN1, /IN1
Differential Inputs: These input pairs are the differential signal inputs to the
device. These inputs accept AC- or DC-coupled signals as small as 100mV
(200mVPP). Each pin of a pair internally terminates to a VT pin through 50Ω.
Please refer to the “Input Interface Applications” section for more details.
4, 22
VT0, VT1
Input Termination Center-Tap: Each side of the differential input pair terminates
to a VT pin. The VT0 and VT1 pins provide a center-tap to a termination network
for maximum interface flexibility. Please refer to the “Input Interface Applications”
section for more details.
3, 21
VREF-AC0
VREF-AC1
Reference Voltage: These outputs bias to VCC–1.2V. They are used for AC-
coupling inputs IN and /IN. Connect VREF-AC directly to the corresponding VT
pin. Bypass with 0.01µF low ESR capacitor to VCC. Maximum sink/source current
is ±1.5mA. Please refer to the “Input Interface Applications” section for more
details.
15
SEL
This single-ended TTL/CMOS-compatible input selects the inputs to the
multiplexer. Note that this input is internally connected to a 25kΩ pull-up resistor
and will default to logic HIGH state if left open.
1, 6, 9, 10,
13, 19, 24
VCC
Positive Power Supply: Bypass with 0.1µF//0.01µF low ESR capacitors as close
to VCC pins as possible.
7, 8
11, 12
Q0, /Q0
Q1, /Q1
Differential Outputs: These differential LVPECL outputs are a logic function of the
IN0, IN1, and SEL inputs. Please refer to the truth table below for details.
14, 17, 18
GND
Exposed Pad
Ground: Ground pin and exposed pad must be connected to the same ground
plane.
16
CAP
Power-On Reset (POR) Initialization capacitor. When using the multiplexer with
RPE capability, the pin is tied to a capacitor to VCC. The purpose is to ensure the
internal RPE logic starts up in a known state. See “Power-On Reset (POR)
Description” section for more details regarding capacitor selection. If this pin is
tied directly to VCC, the RPE function will be disabled and the multiplexer will
function as a normal multiplexer. The CAP pin should never be left open.
Truth Table
INPUTS
OUTPUTS
IN0
/IN0
IN1
/IN1
SEL
Q
/Q
0
1
X
X
0
0
1
1
0
X
X
0
1
0
X
X
0
1
1
0
1
X
X
1
0
1
1
0


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