5

SY89826L

Micrel, Inc.

M9999-011907

hbwhelp@micrel.com or (408) 955-1690

Symbol

Parameter

Condition

Min

Typ

Max

Units

Maximum Toggle Frequency

Note 2

1.0

GHz

Differential Propagation Delay,

LVPECL Input: 150mV

0.750

1.0

1.250

ns

Note 3

LVPECL Input: 800mV

0.6

0.850

1.10

ns

LVDS Input: 100mV

0.950

1.2

1.450

ns

LVDS Input: 400mV

0.800

1.0

1.30

ns

CLK_SEL-to-Valid Output

1.4

1.7

ns

Output Enable Set-Up Time

Note 4

1.0

ns

Output Enable Hold Time

Note 4

0.5

ns

Within Device Skew

Note 5

0

°C to +85°C25

50

ps

–40

°C75

ps

Part-to-Part Skew

Note 6

400

ps

Cycle-to-Cycle

Note 7

1ps

RMS

Total Jitter

Note 8

<1

2

ps

PP

Output Rise/Fall Times

200

290

400

ps

(20% to 80%)

Note 1.

100

Ω termination between Q and /Q outputs. Airflow ≥300lfpm, or exposed pad soldered to ground plane. Typicals are at nominal supply,

T

Note 2.

Note 3.

Differential propagation delay is defined as the delay from the crossing point of the differential input signals to the crossing point of the differential

output signals.

Note 4.

Set-up and hold time applies to synchronous applications that intend to enable/disable before the next clock cycle. For asynchronous applications,

set-up and hold time does not apply. OE set-up time is defined with respect to the rising edge of the clock. OE HIGH to LOW transition ensures

outputs remain disabled during the next clock cycle. OE LOW to HIGH transition enables normal operation of the next input clock.

Note 5.

The within-device skew is defined as the worst case difference between any two similar delay paths within a single device with identical input

transition, operating at the same voltage and temperature.

Note 6.

The part-to-part skew is defined as the absolute worst case difference between any two delay paths on any two devices operating at the same voltage

and temperature. Part-to-part skew is the total skew difference; pin-to-pin skew + part-to-part skew.

Note 7.

Cycle-to-cycle jitter definition: The variation in period between adjacent cycles over a random sample of adjacent cycle pairs. T

where T is the time between rising edges of the output signal.

Note 8.

peak jitter value.