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SY58627L Datasheet(PDF) 10 Page - Micrel Semiconductor |
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SY58627L Datasheet(HTML) 10 Page - Micrel Semiconductor |
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10 / 18 page  Micrel, Inc. SY58627L Janaury 2006 10 M9999-012606-A hbwhelp@micrel.com or (408) 955-1690 Detailed Description The SY58627L is a high speed, low jitter receive buffer with integrated loopback capability. This buffer also provides input signal detect and output disable. Four selectable levels of equalization are included with the receiver. Equalization allows for faster data rates and longer distances by reducing the effects of intersymbol interference (ISI) caused by long cable and trace lengths. Input equalization supports data rates up to 6.4Gbps. DC-Offset Capability The SY58627L transmitter includes the VTTIN and VTTOUT pin for maximum interface flexibility and DC- offset capability for the input and output, respectively. This feature allows for interfacing with different logic families without the use of AC-coupling. The output buffer has internal 50Ω source terminated CML outputs for minimizing round-trip reflections. Transmitter Disable and Shutdown The SY58627L disable function is initiated by pulling /RXEN to logic HIGH. In disable mode, RXQ goes to a LOW state and /RXQ goes to a HIGH state. The threshold for /RXEN is set with the VTH pin. When the VTH pin is floating, the VTH levels are TTL/CMOS- compatible with a threshold voltage at VCC/2 (VEE = 0V). For PECL compatible levels, apply a VCC-1.3V voltage at the VTH pin. Please refer to, “Typical Operating Characteristics” for more details. Loopback The SY58627L features a loopback test mode, activated by setting LBSEL to logic HIGH. Using the SY58627L with the SY58626L enables local loopback and link side loopback, shown in Figures 2b and 2c. This mode enables an external loopback path, bypassing circuitry on both local and link side. Please refer to Table 1 and Figure 3 for Loopback Control information. Figure 2a. Normal Operation Figure 2b. Local Loopback Mode |
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