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AAT3216IGV-1.5-T1 Datasheet(PDF) 10 Page - Advanced Analogic Technologies |
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AAT3216IGV-1.5-T1 Datasheet(HTML) 10 Page - Advanced Analogic Technologies |
10 / 16 page AAT3216 150mA MicroPower™ LDO with PowerOK 10 3216.2006.01.1.3 POK Output The AAT3216 features an integrated Power-OK comparator which can be used as an error flag. The POK open-drain output goes low when OUT is 6% below its nominal regulation voltage. Connect a pull-up resistor from POK to OUT or IN. A delayed POK signal can be implemented with a capacitor in parallel with the pull-up resistor. Enable Function The AAT3216 features an LDO regulator enable/ disable function. This pin (EN) is active high and is compatible with CMOS logic. To assure the LDO regulator will switch on, the EN turn-on control level must be greater than 2.0V. The LDO regulator will go into the disable shutdown mode when the volt- age on the EN pin falls below 0.6V. If the enable function is not needed in a specific application, it may be tied to V IN to keep the LDO regulator in a continuously on state. When the LDO regulator is in the shutdown mode, an internal 1.5k Ω resistor is connected between V OUT and GND. This is intended to discharge COUT when the LDO regulator is disabled. The internal 1.5k Ω has no adverse effect on device turn-on time. Short-Circuit Protection The AAT3216 contains an internal short-circuit pro- tection circuit that will trigger when the output load current exceeds the internal threshold limit. Under short-circuit conditions, the output of the LDO reg- ulator will be current limited until the short-circuit condition is removed from the output or LDO regu- lator package power dissipation exceeds the device thermal limit. Thermal Protection The AAT3216 has an internal thermal protection cir- cuit which will turn on when the device die temper- ature exceeds 150°C. The internal thermal protec- tion circuit will actively turn off the LDO regulator output pass device to prevent the possibility of over- temperature damage. The LDO regulator output will remain in a shutdown state until the internal die temperature falls back below the 150°C trip point. The combination and interaction between the short- circuit and thermal protection systems allows the LDO regulator to withstand indefinite short-circuit conditions without sustaining permanent damage. No-Load Stability The AAT3216 is designed to maintain output volt- age regulation and stability under operational no- load conditions. This is an important characteristic for applications where the output current may drop to zero. Reverse Output-to-Input Voltage Conditions and Protection Under normal operating conditions, a parasitic diode exists between the output and input of the LDO regulator. The input voltage should always remain greater than the output load voltage, main- taining a reverse bias on the internal parasitic diode. Conditions where V OUT might exceed VIN should be avoided since this would forward bias the internal parasitic diode and allow excessive current flow into the V OUT pin, possibly damaging the LDO regulator. In applications where there is a possibility of V OUT exceeding V IN for brief amounts of time during nor- mal operation, the use of a larger value C IN capaci- tor is highly recommended. A larger value of C IN with respect to C OUT will effect a slower CIN decay rate during shutdown, thus preventing V OUT from exceeding V IN. In applications where there is a greater danger of V OUT exceeding VIN for extended periods of time, it is recommended to place a Schottky diode across V IN to VOUT (connecting the cathode to V IN and anode to VOUT). The Schottky diode forward voltage should be less than 0.45V. Thermal Considerations and High Output Current Applications The AAT3216 is designed to deliver a continuous output load current of 150mA under normal operat- ing conditions. The limiting characteristic for the maximum output load current safe operating area is essentially package power dissipation and the internal preset thermal limit of the device. In order to obtain high operating currents, careful device layout and circuit operating conditions must be taken into account. |
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