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AAT3120ITP-T1 Datasheet(PDF) 7 Page - Advanced Analogic Technologies |
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AAT3120ITP-T1 Datasheet(HTML) 7 Page - Advanced Analogic Technologies |
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7 / 14 page  AAT3120 3-Channel Charge Pump For White LED Applications 3120.2005.11.1.1 7 Functional Block Diagram 1X / 1.5X Charge Pump Soft-Start Control 1MHz Oscillator Voltage Reference Quad Output DAC Current Reference Single-Wire Interface 32 x 16 bit ROM C1+ C1- C2+ C2- OUT D1 D2 D3 GND EN/SET VIN Functional Description The AAT3120 is a dual mode load switch (1X) and high efficiency (1.5X) fractional charge pump device intended for white LED backlight applica- tions. The fractional charge pump consists of a low dropout linear voltage regulator followed by a 1.5X charge pump with multiple current source outputs. To maximize power conversion efficiency, an inter- nal feedback control sensing circuit monitors the voltage required on the constant current source outputs. This control circuit then sets the load switch and charge pump functions based upon the input voltage level versus the output voltage level needed. The 1X load switch / 1.5X charge pump mode is decided on the voltage sensed on the out- put D1. Switchover between the 1.5X (charge- pump) operating mode and the 1X (load switch) mode occurs automatically (as a function of input and output voltages) and does not require user intervention to maintain maximum efficiency. The AAT3120 requires only four external compo- nents: two 1µF ceramic capacitors for the charge pump flying capacitors (C1 and C2), one 1µF ceramic input capacitor (C IN), and one 0.33µF to 1µF ceramic output capacitor (C OUT). The LDO / 1.5X charge pump output is converted into three (D1 to D3) constant current outputs to drive three individual LEDs with a maximum current of 20mA each. The current source output magnitude is con- trolled by the EN/SET serial data single-wire inter- face. The interface records rising edges of the EN/SET pin and decodes them into eight individual current level settings (see Table 1, Current Level Settings). Once the final clock cycle is input for the desired brightness level, the EN/SET pin is held high to maintain the device output current at the programmed level. The device is disabled 500µs after the EN/SET pin transitions to a logic low state. |
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